Hi Lukas, On Fri, Mar 18, 2022 at 03:51:21PM +0100, Lukas Wunner wrote: > On Fri, Mar 18, 2022 at 02:08:16PM +0000, Robin Murphy wrote: > > OK, so do we have any realistic options for identifying the correct PCI > > devices, if USB4 PCIe adapters might be anywhere relative to their > > associated NHI? Short of maintaining a list of known IDs, the only thought I > > have left is that if we walk the whole PCI segment looking specifically for > > hotplug-capable Gen1 ports, any system modern enough to have Thunderbolt is > > *probably* not going to have any real PCIe Gen1 hotplug slots, so maybe > > false negatives might be tolerable, but it still feels like a bit of a > > sketchy heuristic. > > The Thunderbolt Device ROM contains the PCI slot number, so you can > correlate the Thunderbolt switch ports with PCIe downstream ports > and know exactly where PCIe tunnels are terminated. > > Code is here: > * thunderbolt: Obtain PCI slot number from DROM > https://github.com/l1k/linux/commit/756f7148bc10 > * thunderbolt: Move upstream_port to struct tb > https://github.com/l1k/linux/commit/58f16e7dd431 > * thunderbolt: Correlate PCI devices with Thunderbolt ports > https://github.com/l1k/linux/commit/f53ea40a7487 > > I implemented that in 2018, so it won't apply cleanly to current > mainline. But I kept forward-porting it on my private branch and > could push that to GitHub if anyone is interested. > > I don't know if this will work out-of-the-box for SoC-integrated > Thunderbolt controllers. It was developed with the discrete > controllers in mind, which was the only thing available back then. That DROM entry is completely optional and so is the whole DROM for the host routers (this is the root of the USB4/TBT topology) so unfortunately we cannot use it here.
