18.08.2021 07:53, Viresh Kumar пишет: > On 18-08-21, 07:37, Dmitry Osipenko wrote: >> This will set voltage level without having an actively used hardware. >> Take a 3d driver for example, if you set the rate on probe and >> rpm-resume will never be called, then the voltage will be set high, >> while hardware is kept suspended if userspace will never wake it up by >> executing a 3d job. > > What exactly are we looking to achieve with this stuff ? Cache the > current performance state with genpd (based on the state bootloader's > has set) ? Yes, GENPD will cache the perf state across suspend/resume and initially cached value is out of sync with h/w. > Or anything else as well ? Nothing else. But let me clarify it all again. Initially the performance state of all GENPDs is 0 for all devices. The clock rate is preinitialized for all devices to a some default rate by clk driver, or by bootloader or by assigned-clocks in DT. When device is rpm-resumed, the resume callback of a device driver enables the clock. Before clock is enabled, the voltage needs to be configured in accordance to the clk rate. So now we have a GENPD with pstate=0 on a first rpm-resume, which doesn't match the h/w configuration. Calling dev_pm_opp_sync() sets the pstate in accordance to the h/w config. In a previous v7 I proposed to preset the rpm_pstate of GENPD (perf level that is restored before device is rpm-resumed) from PD's attach_dev callback, but Ulf didn't like that because it requires to use and modify GENPD 'private' variables from a PD driver. We decided that will be better to make device drivers to explicitly sync the perf state, which I implemented in this v8.
