Re: [BUG REPORT] usb: dwc3: Timeouts with USB 2.0 LPM active

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On 3.5.2021 16.52, Felipe Balbi wrote:
> 
> Hi,
> 
> (before anything, thanks for actually following the steps for bug
> reporting. Much, much appreciated)
> 
> Sebastian von Ohr <vonohr@xxxxxxxxxxx> writes:
> 
>> I'm running an Intel Apollo Lake SoM (Celeron N3350E) which I want to use as 
>> a USB gadget with the functionFS gadget driver. I have created two bulk 
>> endpoints for sending and receiving data. The hardware and cabling is only USB 
>> 2.0 capable. In one test case the receive side of the SoM is slowed down 
>> deliberately (200ms sleep between reads) while the host PC tries to send as 
>> fast as possible. This setup leads to send timeouts on every second 
>> transmission on the host PC.
>>
>> I believe this is an issue with the USB 2.0 LPM feature, more specifically 
>> hardware LPM done by the host USB controller. I have tested different USB 
> 
> It's like the host is trying to go down to lower LPM states every 100ms:
> 
>      irq/13-dwc3-236     [000] d..1    71.363262: dwc3_event: event (00000401): WakeUp [U0]
>      irq/13-dwc3-236     [000] d..1    71.363315: dwc3_event: event (00000401): WakeUp [U0]
>      irq/13-dwc3-236     [000] d..1    71.363423: dwc3_event: event (00006084): ep1out: Transfer In Progress [0] (SIm)
> 
>> descriptors and the issue is gone when removing the USB_LPM_SUPPORT flag from 
>> the USB 2.0 extension descriptor (actually removing only USB_BESL_SUPPORT seems 
>> to suffice). Also the issue occurs only on some newer PCs and adding a hub 

xhci driver enables USB2 LPM only if hardware LPM is supported, driver itself won't do
any L0 -> L1 -> L0 transition. 
It only sets a L1 timeout (inactivirty timer) after  which host sends LPM token.

This can be adjusted on host side in sysfs  file "usb2_lpm_l1_timeout" for thid device.

> 
> it could be that LPM is disabled on older xHCI revisions. Mathias,
> anything you can add here?

xhci driver will only use USB2 LPM if the host supports Hardware LPM capability (HLC bit),
this was optional before xHCI 1.1. 


>> (doesn't matter if 2.0 or 3.0 capable) makes the issue go away. I can 
>> reproduce this issue with a Windows 10 (1909) host running an Intel B360 
>> chipset. I use libusb v1.0.24 with the WinUSB driver on the host side to send 
>> data on the bulk endpoint.

xhci driver in linux only enables USB2 LPM for devices directly conncted to root port.
> 
> could you share a dump of your descriptors? It could be that the wake-up
> latencies are incorrect which tricks the host into trying to go down to
> lower LPM states too frequently.
> 
>> See the attached dwc3 trace and registers. It was created using the current 
>> 5.12.1 kernel version. It shows multiple WakeUp [U0] events in short succession 
>> but never any event showing different link states than U0. The host is doing 8 
>> transmissions of 16 bytes to the device, but the device only receives 4 of 
>> these transmissions. The first transmissions always succeeds while the next one 
>> will timeout on the host. I believe this is because the device is currently not 
>> ready to receive new data. But instead of sending the data when the delay on 
>> the receive side is over the request never finishes and times out after 1 
>> second (or even longer when I increase the timeout value).
>>
>> Is the USB 2.0 LPM extension even supposed to work with the dwc3 controller? I 
> 
> yes, it should be supported :-)
> 
>> can work around this issue currently by downgrading the device to USB 2.0 only 
>> (setting bcdUSB to 0x0200). But I believe USB 3.0 capable device must support 
>> LPM, so this issue might come up again when having USB 3.0 capable hardware.
> 
> correct, LPM is mandatory for USB3.0+. From the traces, we don't see any
> errors, though. Everything looks fine.
> 
> Mathias, I have an old memory from my time at Intel when we discussed
> this very fact. I can't remember what was the conclusion, but is there
> anything the peripheral can do to tell the host to *not* enter U1/U2 so
> frequently? If my memory doesn't fail me, I don't think there is
> anything at all for the peripheral to do, right? Other than not
> supporting U1/U2, which means STALLing the relevat SetFeature
> requests. Do you know if that would still be a certifiable solution?

STALL response to LPM should cause xHCI to disable hardware LPM for this device.

Also NYET response should be visible to xhci driver (L1S) fields in PORTPMSC.
In theory we could try to check this and decide to increase L1 timeout if there are 
frequent NYETs, but there is no driver support for this

Note: xhci specs 4.23.5.1.1 also state:

In the case of a High-speed Bulk OUT Endpoint that has returned a NYEThandshake for
an OUT transaction and then the Hardware LPM mechanism transitions the link to the L1 state,
the xHC shall not initiate a L1 Exit (i.e. wake
up the link) to do a PING transaction. The device is expected to initiate an L1
exit (Remote Wake) when it is ready to accept data.

Does this device support L1 exit (remote wake)?

-Mathias 



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