On Fri, Feb 05, 2021 at 08:20:09PM +0800, Prike Liang wrote: > The XHCI is required enter D3hot rather than D3cold for AMD s2idle solution. > Otherwise, the 'Controller Not Ready' (CNR) bit not being cleared by host > in resume and eventually result in xhci resume failed in s2idle wakeup period. I do not understand this, can you perhaps rephrase it differently? Also, please mention the specific hardware that has this bug in the commit log, or on the subject line, as the subject line is saying that this change is needed for all devices, when really only one is broken. > > v1 -> v2: drop the XHCI_COMP_MODE_QUIRK quirk and create a new one for handling > XHCI D3cold. > > v2 -> v3: correct the quirk name typo XHCI_AMD_S2IDL_SUPPORT_QUIRK -> XHCI_AMD_S2IDLE_SUPPORT_QUIRK This goes below the --- line, as the documentation asks for. thanks, greg k-h
