On 28-04-2020 17:55, Thierry Reding wrote:
On Thu, Apr 16, 2020 at 01:04:20PM +0530, Nagarjuna Kristam wrote:
Add port_speed_quirk that modify below registers to limit/restore OTG
port speed to GEN1/GEN2.
SSPX_CORE_CNT56
SSPX_CORE_CNT57
SSPX_CORE_CNT65
SSPX_CORE_CNT66
SSPX_CORE_CNT67
SSPX_CORE_CNT72
The basic idea is to make SCD intentionally fail, reduce SCD timeout and
force device transit to TSEQ. Enable this flag to only Tegra194.
Based on work by WayneChang<waynec@xxxxxxxxxx>
Signed-off-by: Nagarjuna Kristam<nkristam@xxxxxxxxxx>
---
drivers/usb/gadget/udc/tegra-xudc.c | 106 ++++++++++++++++++++++++++++++++++++
1 file changed, 106 insertions(+)
You're telling readers what you're doing, but after reading the commit
message, I have no idea why this is being done. Can you provide more
information on why exactly is this needed? Why do we have to limit the
OTG port speed?
Thierry
Will re-word the commit message to explain on why this is needed.
Thanks,
Nagarjuna
