On Thu, 11 Jun 2009, Alek Du wrote:
> From 6dba6524d4c79813e52706a6123eb357cbc1bbda Mon Sep 17 00:00:00 2001
> From: Alek Du <alek.du@xxxxxxxxx>
> Date: Wed, 10 Jun 2009 15:20:21 +0800
> Subject: [PATCH] EHCI: Support Intel Moorestown MPH and OTG host
>
> The Intel Moorestown platform has EHCI MPH and EHCI OTG host. This patch adds
> PCI probe part for them. The HNP part and SRAM part will be added in another
> patches. This patch depends on the OTG transceive and OTG client patch from Hang
> Yuan that should be accepted already.
>
> Signed-off-by: Jacob Pan <jacob.jun.pan@xxxxxxxxx>
> Signed-off-by: Alek Du <alek.du@xxxxxxxxx>
> diff --git a/drivers/usb/host/ehci-hub.c b/drivers/usb/host/ehci-hub.c
> index 5cc5cbb..63ced4b 100644
> --- a/drivers/usb/host/ehci-hub.c
> +++ b/drivers/usb/host/ehci-hub.c
> @@ -112,6 +112,11 @@ static int ehci_bus_suspend (struct usb_hcd *hcd)
> int port;
> int mask;
> u32 __iomem *hostpc_reg = NULL;
> +#ifdef CONFIG_USB_LANGWELL_OTG
> + struct otg_transceiver *otg;
> + struct langwell_otg *iotg;
> + struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
> +#endif
>
> ehci_dbg(ehci, "suspend root hub\n");
>
> @@ -208,6 +213,25 @@ static int ehci_bus_suspend (struct usb_hcd *hcd)
> ehci_readl(ehci, &ehci->regs->intr_enable);
>
> ehci->next_statechange = jiffies + msecs_to_jiffies(10);
> +#ifdef CONFIG_USB_LANGWELL_OTG
> + otg = otg_get_transceiver();
> + if (otg == NULL) {
> + printk(KERN_ERR "%s Failed to get otg transceiver\n", __func__);
> + spin_unlock_irq(&ehci->lock);
> + return -EINVAL;
> + }
> + iotg = container_of(otg, struct langwell_otg, otg);
> + if (!strcmp(dev_name(&pdev->dev), dev_name(&iotg->pdev->dev))) {
> + printk(KERN_INFO "%s OTG HNP update suspend\n", __func__);
> + if (iotg->otg.default_a == 1)
> + iotg->hsm.a_suspend_req = 1;
> + else
> + iotg->hsm.b_bus_req = 0;
> + langwell_update_transceiver();
> +
> + }
> + otg_put_transceiver(otg);
> +#endif
It would be good to see this encapsulated better, perhaps in a way that
could be shared with other OTG implementations. At least move it into
a separate function instead of putting it inside #ifdef.
> spin_unlock_irq (&ehci->lock);
> return 0;
> }
> @@ -221,6 +245,11 @@ static int ehci_bus_resume (struct usb_hcd *hcd)
> u32 power_okay;
> int i;
> u8 resume_needed = 0;
> +#ifdef CONFIG_USB_LANGWELL_OTG
> + struct otg_transceiver *otg;
> + struct langwell_otg *iotg;
> + struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
> +#endif
>
> if (time_before (jiffies, ehci->next_statechange))
> msleep(5);
> @@ -309,6 +338,23 @@ static int ehci_bus_resume (struct usb_hcd *hcd)
> /* Now we can safely re-enable irqs */
> ehci_writel(ehci, INTR_MASK, &ehci->regs->intr_enable);
>
> +#ifdef CONFIG_USB_LANGWELL_OTG
> + otg = otg_get_transceiver();
> + if (otg == NULL) {
> + printk(KERN_ERR "%s Failed to get otg transceiver\n", __func__);
> + spin_unlock_irq(&ehci->lock);
> + return -EINVAL;
> + }
> + iotg = container_of(otg, struct langwell_otg, otg);
> + if (!strcmp(dev_name(&pdev->dev), dev_name(&iotg->pdev->dev))) {
> + printk(KERN_INFO "%s OTG HNP update resume\n", __func__);
> + if (iotg->otg.default_a) {
> + iotg->hsm.b_bus_resume = 1;
> + langwell_update_transceiver();
> + }
> + }
> + otg_put_transceiver(otg);
> +#endif
Encapsulate this too.
> spin_unlock_irq (&ehci->lock);
> ehci_handover_companion_ports(ehci);
> return 0;
> diff --git a/drivers/usb/host/ehci-pci.c b/drivers/usb/host/ehci-pci.c
> index 5aa8bce..7c5b9bf 100644
> --- a/drivers/usb/host/ehci-pci.c
> +++ b/drivers/usb/host/ehci-pci.c
> +static int ehci_langwell_probe(struct pci_dev *pdev,\
> + const struct pci_device_id *id)
> +{
...
> +}
> +
> +void ehci_langwell_remove(struct pci_dev *dev)
> +{
...
> +}
> +#endif
> +
> /*-------------------------------------------------------------------------*/
>
> /* PCI driver selection metadata; PCI hotplugging uses this */
> @@ -418,6 +567,15 @@ static const struct pci_device_id pci_ids [] = { {
> PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_EHCI, ~0),
> .driver_data = (unsigned long) &ehci_pci_hc_driver,
> },
> + {
> + /* handle MRST USB 2.0 EHCI controller */
> + PCI_DEVICE_CLASS(0x0c2000, ~0),
> + .driver_data = (unsigned long) &ehci_pci_hc_driver,
> + },
> + {
> + PCI_DEVICE_CLASS(0x0c03fe, ~0),
> + .driver_data = (unsigned long) &ehci_pci_hc_driver,
> + },
> { /* end: all zeroes */ }
> };
With all these changes and additions (including whole new probe and
remove routines!), wouldn't it be cleaner simply to add a separate
ehci-langwell-pci.c driver file?
Alan Stern
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