Hi, John Stultz <john.stultz@xxxxxxxxxx> writes: > On Tue, Oct 29, 2019 at 2:14 AM Felipe Balbi <balbi@xxxxxxxxxx> wrote: >> John Stultz <john.stultz@xxxxxxxxxx> writes: >> >> > The dwc3 core binding specifies three clocks: >> > ref, bus_early, and suspend >> > >> > which are all controlled in the driver together. >> > >> > However some variants of the hardware my not have all three clks >> ^^ >> may >> >> In fact *all* platforms have all three clocks. It's just that in some >> cases clock pins are shorted together (or take input from same clock). >> > ... >> another option would be to pass three clocks with the same phandle. That >> would even make sure that clock usage counts are correct, no? > > Hey Felipe! > > So I actually had done that initially (and it seemed to work), but Rob > suggested this way instead. > I'm fine with either, as long as having multiple references to the > same clk in the enable/disable paths doesn't cause trouble. > > Thanks so much for the review here! same as the other patch, if we're supposed to describe the HW, then we should describe what's actually happening. -- balbi
