Re: No SuperSpeedPlus on ASM2142

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On 16.9.2019 23.53, Loïc Yhuel wrote:
Le lun. 16 sept. 2019 à 17:19, Loïc Yhuel <loic.yhuel@xxxxxxxxx> a écrit :

Most reliable way of checking the current actual port speed is reading protocol speed id
from the ports PORTSC register port-speed field.
Use debugfs: (with your correct pci address and port number)
Currently I have "PortSpeed:4" which matches with the "Gen 1" trace.
If I even get a "Gen 2" trace again, I will check.


Just fyi, turns out initial xHCI 1.1 spec was a bit unclear about SBRN
and minor revision numbers, later xHCI specs clarify them better.
A few USB 3.1 capable xHCI hosts were based on that spec, not just the ASM2142.
They have SBRN set to 30h and minor revision 0x1.
I'll send a patch to detect those correctly.

But it won't fix your inconsistency with PortSpeed bits in PORTSC register.


Btw, I found another problem on resuming the system after a suspend :
[  137.029272] pcieport 0000:00:01.1: PME: Spurious native interrupt!
...
[  137.129618] xhci_hcd 0000:08:00.0: WARN: xHC restore state timeout
[  137.129624] xhci_hcd 0000:08:00.0: PCI post-resume error -110!
[  137.129625] xhci_hcd 0000:08:00.0: HC died; cleaning up
[  137.129633] PM: dpm_run_callback(): pci_pm_resume+0x0/0x90 returns -110
[  137.129636] PM: Device 0000:08:00.0 failed to resume async: error -110
Then a "echo 1 > remove, then "echo 1 > ../rescan" on sysfs got it back.
This is a completely different issue, but at least, I can reproduce
this one reliably.


Looks like the xHCI PCI controller wasn't fully powered up to D0 state yet
when xhci_resume was called. Looks similar to what is discussed in thread:

https://marc.info/?l=linux-usb&m=156681068319529&w=2

-Mathias



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