Re: [PATCH] usb: dwc2: Use generic PHY width in params setup

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Hi Jules,

On 2019-05-07 12:08, Jules Maselbas wrote:
> Setting params.phy_utmi_width in dwc2_lowlevel_hw_init() is pointless since
> it's value will be overwritten by dwc2_init_params().
>
> This change make sure to take in account the generic PHY width information
> during parmas initialization, done in dwc2_set_param_phy_utmi_width().
>
> By doing so, the phy_utmi_width params can still be overridden by
> devicetree specific params and will also be checked against hardware
> capabilities.
>
> Signed-off-by: Jules Maselbas <jmaselbas@xxxxxxxxx>

Right, this fixes the issue spotten on Exynos4412 SoCs.

Tested-by: Marek Szyprowski <m.szyprowski@xxxxxxxxxxx>

IMHO it would also make sense to add:

Fixes: 707d80f0a3c5 ("usb: dwc2: gadget: Replace phyif with phy_utmi_width")

> ---
>   drivers/usb/dwc2/params.c   | 9 +++++++++
>   drivers/usb/dwc2/platform.c | 9 ---------
>   2 files changed, 9 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c
> index 6900eea57526..5949262ff669 100644
> --- a/drivers/usb/dwc2/params.c
> +++ b/drivers/usb/dwc2/params.c
> @@ -253,6 +253,15 @@ static void dwc2_set_param_phy_utmi_width(struct dwc2_hsotg *hsotg)
>   	val = (hsotg->hw_params.utmi_phy_data_width ==
>   	       GHWCFG4_UTMI_PHY_DATA_WIDTH_8) ? 8 : 16;
>   
> +	if (hsotg->phy) {
> +		/*
> +		 * If using the generic PHY framework, check if the PHY bus
> +		 * width is 8-bit and set the phyif appropriately.
> +		 */
> +		if (phy_get_bus_width(hsotg->phy) == 8)
> +			val = 8;
> +	}
> +
>   	hsotg->params.phy_utmi_width = val;
>   }
>   
> diff --git a/drivers/usb/dwc2/platform.c b/drivers/usb/dwc2/platform.c
> index d10a7f8daec3..e98d7812da2d 100644
> --- a/drivers/usb/dwc2/platform.c
> +++ b/drivers/usb/dwc2/platform.c
> @@ -271,15 +271,6 @@ static int dwc2_lowlevel_hw_init(struct dwc2_hsotg *hsotg)
>   
>   	hsotg->plat = dev_get_platdata(hsotg->dev);
>   
> -	if (hsotg->phy) {
> -		/*
> -		 * If using the generic PHY framework, check if the PHY bus
> -		 * width is 8-bit and set the phyif appropriately.
> -		 */
> -		if (phy_get_bus_width(hsotg->phy) == 8)
> -			hsotg->params.phy_utmi_width = 8;
> -	}
> -
>   	/* Clock */
>   	hsotg->clk = devm_clk_get_optional(hsotg->dev, "otg");
>   	if (IS_ERR(hsotg->clk)) {

Best regards
-- 
Marek Szyprowski, PhD
Samsung R&D Institute Poland




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