Hi Maynard,
On 1/30/2019 3:09 AM, Maynard Cabiente wrote:
> Hi Minas,
>
> On Tue, Jan 29, 2019 at 5:30 AM Minas Harutyunyan
> <minas.harutyunyan@xxxxxxxxxxxx> wrote:
>> Please send me regdump.
>>
>
> Below is the regdump you requested. But, I'm not sure if this is the
> time when it is failing or not as it is hard for me to determine (and
> time it) when it fails without looking at the USB trace or kernel
> logs.
>
>
> Regards,
> Maynard
>
Root cause of data messing between IN EP's because all IN EP's use same
TXFIFO. TxFIFO number 7. See DIEPCTL's, bits 22-25 txfnum, from debug logs:
EP1IN DIEPCTL = 0x11ca8200
EP2IN DIEPCTL = 0x11ca8200
EP5IN DIEPCTL = 0x11ce8008
Please apply below temporary patch for testing, in
dwc2_hsotg_ep_enable() function add follow row to reset previous value
of TxFIFO num:
@@ -4005,6 +4016,7 @@ static int dwc2_hsotg_ep_enable(struct usb_ep *ep,
ret = -ENOMEM;
goto error1;
}
+ epctrl &= ~(DXEPCTL_TXFNUM_LIMIT << DXEPCTL_TXFNUM_SHIFT);
hsotg->fifo_map |= 1 << fifo_index;
epctrl |= DXEPCTL_TXFNUM(fifo_index);
hs_ep->fifo_index = fifo_index;
One more note.
We have one patch after 4.14.44:
"usb: dwc2: Fix TxFIFOn sizes and total TxFIFO size issues"
commit ID 9273083a1530891360e9fe4fad26ae96810db499
This patch fixes issue with TxFIFO allocations. Actually, based on your
setup regdump, TxFIFO's allocations are NOT wrong (DPTXFSIZN(1-15)) even
without mentioned patch, but issue can popup in some scenarios.
Any case I suggest you apply above patch.
Thanks,
Minas
