Hi Felipe I received a Rock960 board. It has a rk3399 rockchip armv8 processor with 2 DWC3 controllers. And guess what: it works perfectly fine. No trickery to get super speed connection in device mode. So there is something wrong with the up-board, not with the DWC3 driver. Thanks for you support Le mer. 10 oct. 2018 à 15:01, Felipe Balbi <felipe.balbi@xxxxxxxxxxxxxxx> a écrit : > > > Hi, > > Thomas JOURDAN <thomas.jourdan@xxxxxxxxx> writes: > > >> Ok, so HW itself negotiated HS instead of SS. Note that below ep0 max > >> packet size is set ot 64. > >> > >> irq/13-dwc3-894 [001] d... 250.891132: dwc3_event: event (00000101): Reset [U0] > >> irq/13-dwc3-894 [001] d... 250.941068: dwc3_event: event (00000201): Connection Done [U0] > >> irq/13-dwc3-894 [001] d... 250.941090: dwc3_gadget_ep_cmd: ep0out: cmd 'Set Endpoint Configuration' [1025] params 80000200 00000500 00000000 --> status: Successful > >> irq/13-dwc3-894 [001] d... 250.941095: dwc3_gadget_ep_enable: ep0out: mps 64/512 streams 0 burst 1 ring 0/0 flags E:swBp:e:> > >> irq/13-dwc3-894 [001] d... 250.941103: dwc3_gadget_ep_cmd: ep0in: cmd 'Set Endpoint Configuration' [1025] params 80000200 02000500 00000000 --> status: Successful > >> irq/13-dwc3-894 [001] d... 250.941106: dwc3_gadget_ep_enable: ep0in: mps 64/512 streams 0 burst 1 ring 0/0 flags E:swbp:e:< > > > > I am new to USB protocol. Can this packet size be an issue ? > > no, no. The device definitely negotiated HS :-) > > >> Would you have a usb sniffer to see if the link even attempts to run Rx > >> termination detection? > > > > Unfortunately no but I can do eye diagram. Do you know if there is a > > test mode I can activate for USB3.0 (like tests J/K in USB2.0) ? > > If you have a scope with USB3 test tools, device enters compliance mode > when the link walks a specific pattern of link states. That's encoded on > some scopes sporting the USB3 certification tools. > > >> Another thing to try is setting both of the quirks below: > >> > >> snps,dis_u3_susphy_quirk > >> snps,dis_u2_susphy_quirk > > > > I attached traces with those quirks enabled. Unfortunately it didn't > > improved the situation. > > okay > > > Do you think the issue can be software related ? IMHO it is more > > hardware related, probably something wrong or borderline on the UP2 > > board. I will investigate the hardware side, but the schematics of the > > board aren't opensourced, so I might take some time. > > right, it's unlikely to be SW. Based on registers, device is configured > to support SuperSpeed. > > > I also ordered a Rock960 board. This is an ARMv8 platforrm with the > > same DWC3 controller. I hope this one works and if it does it will be > > a good reference for further investigation. Do you know a SBC board, > > with the DWC3 controller, and a working USB3.0 OTG port ? > > TI's beagle x15 is one of them. There's also some of the 96board > devices... I don't know of upstream support for them though. > > -- > balbi
