RE: [PATCH V6] roles: Fix USB 3.0 OTG issue on Intel platform

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Hi Greg,

"Gopal, Saranya" <saranya.gopal@xxxxxxxxx> writes:
>> > diff --git a/drivers/usb/roles/intel-xhci-usb-role-switch.c
>> b/drivers/usb/roles/intel-xhci-usb-role-switch.c
>> > index dad2d19..0d1ea82 100644
>> > --- a/drivers/usb/roles/intel-xhci-usb-role-switch.c
>> > +++ b/drivers/usb/roles/intel-xhci-usb-role-switch.c
>> > @@ -25,6 +25,9 @@
>> >  #define SW_VBUS_VALID			BIT(24)
>> >  #define SW_IDPIN_EN			BIT(21)
>> >  #define SW_IDPIN			BIT(20)
>> > +#define SW_SWITCH_EN_CFG0		BIT(16)
>> 
>> Why is this not in the correct sorted order with the items above it?

they are sorted in descending order.

/* register definition */
#define DUAL_ROLE_CFG0			0x68
#define SW_VBUS_VALID			BIT(24)
#define SW_IDPIN_EN			BIT(21)
#define SW_IDPIN			BIT(20)

-- 
balbi

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