Hi,
On 07-06-18 18:43, Sergei Shtylyov wrote:
Hello!
On 06/07/2018 01:38 PM, Hans de Goede wrote:
On some Bay Trail (BYT) systems the firmware does not enable the
ULPI Refclk.
This commit adds a helper which checks and if necessary enabled the Refclk
and calls this helper for BYT machines.
Signed-off-by: Hans de Goede <hdegoede@xxxxxxxxxx>
---
drivers/usb/dwc3/dwc3-pci.c | 34 ++++++++++++++++++++++++++++++++++
1 file changed, 34 insertions(+)
diff --git a/drivers/usb/dwc3/dwc3-pci.c b/drivers/usb/dwc3/dwc3-pci.c
index 34b84d3bc7cf..65bc110388f3 100644
--- a/drivers/usb/dwc3/dwc3-pci.c
+++ b/drivers/usb/dwc3/dwc3-pci.c
[...]
@@ -78,6 +81,34 @@ static struct gpiod_lookup_table platform_bytcr_gpios = {
},
};
+static void dwc3_pci_enable_ulpi_refclock(struct pci_dev *pci)
+{
+ void __iomem *reg;
+ struct resource res;
+ struct device *dev = &pci->dev;
+ u32 value;
+
+ res.start = pci_resource_start(pci, 1);
+ res.end = pci_resource_end(pci, 1);
+ res.name = "dwc_usb3_bar1";
+ res.flags = IORESOURCE_MEM;
+
+ reg = devm_ioremap_resource(dev, &res);
+ if (IS_ERR(reg)) {
+ dev_err(dev, "cannot check GP_RWREG1 to assert ulpi refclock\n");
Eh?
BTW, devm_ioremap_resource() prints the error cause already...
+ return;
+ }
+
+ value = readl(reg + GP_RWREG1);
+ if (!(value & GP_RWREG1_ULPI_REFCLK_DISABLE))
I guess that dev_err() belongs here...
Nope the error is that GP_RWREG1 cannot be read because the remap
fails. I agree that this is a bit silly and I will fix for v2,
but returning here without printing anything is correct.
Regards,
Hans
+ return; /* ULPI refclk already enabled */
+
+ dev_warn(dev, "ULPI refclock is disabled from the BIOS, enabling it\n");
+ value &= ~GP_RWREG1_ULPI_REFCLK_DISABLE;
+ writel(value, reg + GP_RWREG1);
+ msleep(100);
+}
+
static int dwc3_pci_quirks(struct dwc3_pci *dwc)
{
struct platform_device *dwc3 = dwc->dwc3;
[...]
MBR, Sergei
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