Re: [PATCH 2/3] usb: dwc3: pci: Enable ULPI Refclk on platforms where the firmware doesnot

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Hi,

On 07-06-18 15:30, Andy Shevchenko wrote:
On Thu, Jun 7, 2018 at 1:38 PM, Hans de Goede <hdegoede@xxxxxxxxxx> wrote:
On some Bay Trail (BYT) systems the firmware does not enable the
ULPI Refclk.

This commit adds a helper which checks and if necessary enabled the Refclk
and calls this helper for BYT machines.


+static void dwc3_pci_enable_ulpi_refclock(struct pci_dev *pci)
+{
+       void __iomem    *reg;
+       struct resource res;
+       struct device   *dev = &pci->dev;
+       u32             value;
+

+       res.start       = pci_resource_start(pci, 1);
+       res.end         = pci_resource_end(pci, 1);
+       res.name        = "dwc_usb3_bar1";
+       res.flags       = IORESOURCE_MEM;
+
+       reg = devm_ioremap_resource(dev, &res);
+       if (IS_ERR(reg)) {
+               dev_err(dev, "cannot check GP_RWREG1 to assert ulpi refclock\n");
+               return;
+       }

I'm not sure I understand what's wrong with simple
pci_iomap() & Co (perhaps pcim_iomap() / pcim_iomap_regions() and others)

Good point, I took this from the crufty Android X86 patched which
Intel maintains here:
https://github.com/01org/ProductionKernelQuilts

And did not realize I could simplify this, will fix for v2.

+
+       value = readl(reg + GP_RWREG1);
+       if (!(value & GP_RWREG1_ULPI_REFCLK_DISABLE))
+               return; /* ULPI refclk already enabled */
+
+       dev_warn(dev, "ULPI refclock is disabled from the BIOS, enabling it\n");
+       value &= ~GP_RWREG1_ULPI_REFCLK_DISABLE;
+       writel(value, reg + GP_RWREG1);

+       msleep(100);

This has to be explained.

Erm, this comes 1:1 from Intels Android X86 patches I've no
idea why it is there, I believe it is better to leave this
uncommented then making something up.

Regards,

Hans

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