-------- Original Message --------
Subject: iMX31 OTG
Date: Mon, 20 Apr 2009 09:41:08 +0100
From: Andy Green <andy@xxxxxxxxxxx>
To: Guennadi Liakhovetski <g.liakhovetski@xxxxxx>
Hi Guennadi -
Sorry to bother you but I have some feedback / question about your iMX31
OTG patches. I am working on an iMX31 design, but currently I try to
get iMX31 USB OTG gadget (only) mode working on a LITE kit board.
I have a Linus HEAD tree with your patches applied to the fsl_usb2_otg.c
and other patches to set up the IO mux in the machine definition file.
The problem I get is that the USB PHY ISP1504 acts erratically session
by session. Sometimes I did succeed to get a fullspeed Ethernet over
USB session running but mostly nothing, or the PHY is in HOST mode, or
has no pullup it should have for device mode.
I tried to look in the PHY using ULPIVIEW, but it always reads back as 0.
I looked around for other git trees that already have your patches
integrated for LITEkit config but I did not find one, even at Sascha's
git repo for example.
Do you have a working tree you pushed anywhere that should work on LITE
Kit config?
Thanks for any advice you can give,
-Andy
On Mon, 20 Apr 2009, Andy Green wrote:
> > Hi Guennadi -
Please, always cc relevant mailing lists. Please, when replying to this my
mail, add the usb ml to cc.
Done.
> > Sorry to bother you but I have some feedback / question about your
iMX31 OTG
> > patches. I am working on an iMX31 design, but currently I try to
get iMX31
> > USB OTG gadget (only) mode working on a LITE kit board.
I have to know which exactly version of my patches you are using. Earlier
versions had a problem, that if you don't unload the driver and reboot,
the PHY wouldn't be initialised.
Thanks
Guennadi
Hi Guennadi -
Attached are the relevant patches. There's enough init in the machine
definition code also to set up the IO Mux according to your patches
about that and declare the platform device with correct IO memory and
IRQ (or nothing would ever work).
You can see that the ULPI init thing having the wrong test is fixed.
I build these as modules as the moment, over the last days at various
times I have had highspeed and fullspeed valid enumerations and good
function, but most of the time the PHY is in a broken state and there is
no working connection (or the PHY is in HOST mode, I can see that
because it is driving on to D+ and D-).
So generally, it is like the PHY powers up to a random state and doesn't
take any commands from the MAC in the iMX31.
There is a 60MHz clock issued by the ISP1504, and the USB PLL in the
iMX31 is set to produce nearly dead-on 60MHz (it's less than 1kHz out)
by the bootloader.
-Andy
add-txtr-a-udc-init.patch
From: Andy Green <andy@xxxxxxxxxxx>
Signed-off-by: Andy Green <andy@xxxxxxxxxxx>
---
arch/arm/mach-mx3/mach-txtr-a.c | 72 +++++++++++++++++++++++++++++++++++++++
1 files changed, 72 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-mx3/mach-txtr-a.c b/arch/arm/mach-mx3/mach-txtr-a.c
index 3362da1..9c9f1bc 100644
--- a/arch/arm/mach-mx3/mach-txtr-a.c
+++ b/arch/arm/mach-mx3/mach-txtr-a.c
@@ -28,6 +28,7 @@
#include <linux/kernel.h>
#include <linux/memory.h>
#include <linux/platform_device.h>
+#include <linux/fsl_devices.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
@@ -89,6 +90,7 @@ void __init txtr_a_map_io(void)
struct platform_device * txtr_a_devices[] = {
&mxcsdhc_device0,
+ &otg_udc_device,
};
/*
@@ -116,6 +118,76 @@ struct sys_timer txtr_a_timer = {
.init = txtr_a_timer_init,
};
+/* USB OTG HS port */
+static int gpio_usbotg_hs_active(void)
+{
+ mxc_iomux_mode(IOMUX_MODE(MX31_PIN_USBOTG_DATA0, IOMUX_CONFIG_FUNC));
+ mxc_iomux_mode(IOMUX_MODE(MX31_PIN_USBOTG_DATA1, IOMUX_CONFIG_FUNC));
+ mxc_iomux_mode(IOMUX_MODE(MX31_PIN_USBOTG_DATA2, IOMUX_CONFIG_FUNC));
+ mxc_iomux_mode(IOMUX_MODE(MX31_PIN_USBOTG_DATA3, IOMUX_CONFIG_FUNC));
+ mxc_iomux_mode(IOMUX_MODE(MX31_PIN_USBOTG_DATA4, IOMUX_CONFIG_FUNC));
+ mxc_iomux_mode(IOMUX_MODE(MX31_PIN_USBOTG_DATA5, IOMUX_CONFIG_FUNC));
+ mxc_iomux_mode(IOMUX_MODE(MX31_PIN_USBOTG_DATA6, IOMUX_CONFIG_FUNC));
+ mxc_iomux_mode(IOMUX_MODE(MX31_PIN_USBOTG_DATA7, IOMUX_CONFIG_FUNC));
+ mxc_iomux_mode(IOMUX_MODE(MX31_PIN_USBOTG_CLK, IOMUX_CONFIG_FUNC));
+ mxc_iomux_mode(IOMUX_MODE(MX31_PIN_USBOTG_DIR, IOMUX_CONFIG_FUNC));
+ mxc_iomux_mode(IOMUX_MODE(MX31_PIN_USBOTG_NXT, IOMUX_CONFIG_FUNC));
+ mxc_iomux_mode(IOMUX_MODE(MX31_PIN_USBOTG_STP, IOMUX_CONFIG_FUNC));
+
+ mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
+ mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
+ mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
+ mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
+ mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
+ mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
+ mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
+ mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
+ mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
+ mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
+ mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
+ mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
+
+ return 0;
+}
+
+/* OTG config */
+
+static struct fsl_usb2_platform_data usb_data = {
+ .operating_mode = FSL_USB2_DR_DEVICE,
+ .phy_mode = FSL_USB2_PHY_ULPI,
+};
+
+static struct resource otg_resources[] = {
+ {
+ .start = USB_OTGREGS_BASE,
+ .end = USB_OTGREGS_BASE + 0x1ff,
+ .flags = IORESOURCE_MEM,
+ }, {
+ .start = MXC_INT_USB3,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static u64 udc_dmamask = DMA_BIT_MASK(32);
+
+/* OTG gadget device */
+static struct platform_device otg_udc_device = {
+ .name = "fsl-usb2-udc",
+ .id = -1,
+ .dev = {
+ .dma_mask = &udc_dmamask,
+ .coherent_dma_mask = 0xffffffff,
+ .platform_data = &usb_data,
+ },
+ .resource = otg_resources,
+ .num_resources = ARRAY_SIZE(otg_resources),
+};
+
+
+
+late_initcall(gpio_usbotg_hs_active);
+
+
/*
* The following uses standard kernel macros defined in arch.h in order to
* initialize __mach_desc_MX31LITE data structure.
fix-fsl-usb-ulpi-enable-clock.patch
From: Andy Green <andy@xxxxxxxxxxx>
Signed-off-by: Andy Green <andy@xxxxxxxxxxx>
---
diff --git a/drivers/usb/gadget/fsl_usb2_udc.c b/drivers/usb/gadget/fsl_usb2_udc.c
index c172fb2..7684342 100644
--- a/drivers/usb/gadget/fsl_usb2_udc.c
+++ b/drivers/usb/gadget/fsl_usb2_udc.c
@@ -2267,8 +2267,8 @@ static int mxc_udc_init(struct platform_device *pdev)
if ((freq < 59999000) || (freq > 60001000))
dev_warn(&pdev->dev, "USB_CLK=%lu, should be 60MHz\n", freq);
- /* Turn off the usbpll for ulpi transceivers */
- if (pdata->phy_mode != FSL_USB2_PHY_ULPI) {
+ /* Turn on the usbpll for ulpi transceivers */
+ if (pdata->phy_mode == FSL_USB2_PHY_ULPI) {
ret = clk_enable(mxc_usb_clk);
if (ret < 0) {
dev_err(&pdev->dev, "clk_enable(\"usb_clk\") failed\n");
