Thinh Nguyen <Thinh.Nguyen@xxxxxxxxxxxx> writes: > From DWC_usb31 programming guide section 1.3.2, once DWC3_DCTL_CSFTRST > bit is cleared, we must wait at least 50ms before accessing the PHY > domain (synchronization delay). > > Signed-off-by: Thinh Nguyen <thinhn@xxxxxxxxxxxx> checking file drivers/usb/dwc3/core.c Hunk #1 FAILED at 228. 1 out of 1 hunk FAILED -- balbi
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