RE: [PATCH 3/3] usb: dwc3: ep0: improve handling of unaligned OUT requests

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Hi,

David Laight <David.Laight@xxxxxxxxxx> writes:
> From: Felipe 
>> Sent: 12 April 2017 06:57
>> Felipe Balbi <felipe.balbi@xxxxxxxxxxxxxxx> writes:
>> >> From: Felipe Balbi
>> >>> Sent: 07 April 2017 12:37
>> >>> Just like we did for all other endpoint types, let's rely on a chained
>> >>> TRB pointing to ep0_bounce_addr in order to align transfer size. This
>> >>> will make the code simpler.
>> >> ...
>> >>
>> >> Is the dwc3 similar enough to xhci to have an 'immediate data' bit?
>> >> If so the aligning data could come from the 8 byte 'address' field.
>> >
>> > you mean like patch 1 in this very series?
>> 
>> Oh no, you mean for the remaining bytes for alignment. Well, 8 bytes
>> might not be enough to align anything, right? :-)
>> 
>> Besides, "aligned" here refers to length not memory address :-) OUT
>> transfers on dwc3 need to have their length setup so that it is
>> divisible by wMaxPacketSize of the endpoint in question.
>
> Hardware engineers seem to be making things that appear to be useful,
> but in practise are almost to program for.
>
> I might be mixing up what is fixing what...
>
> I was thinking of the borked hardware than can only dma from aligned
> addresses.

oh, DWC3 doesn't have that limitation. That's DWC2 :-) USB2-only IP from
same company. DWC3 has USB3.1 GEN1 and GEN2 versions ;-)

-- 
balbi

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