Hi,
John Youn <John.Youn@xxxxxxxxxxxx> writes:
> On 1/12/2017 7:52 AM, Nicholas Mc Guire wrote:
>> ulseep_range() uses hrtimers and provides no advantage over msleep()
>> for larger delays. Fix up the 20+ ms delays here passing the adjusted "min"
>> value to msleep(). This helps reduce the load on the hrtimer subsystem.
>>
>> Signed-off-by: Nicholas Mc Guire <hofrat@xxxxxxxxx>
>> ---
>>
>> Patch was compile tested with: x86_64_defconfig + CONFIG_USB_DWC2
>> (1 sparse and 6 coccinelle warning - preparing separate patches for that)
>>
>> Patch is against 4.10-rc3 (localversion-next is next-20170112)
>>
>> drivers/usb/dwc2/hcd.c | 12 ++++++------
>> 1 file changed, 6 insertions(+), 6 deletions(-)
>>
>> diff --git a/drivers/usb/dwc2/hcd.c b/drivers/usb/dwc2/hcd.c
>> index 911c3b3..37ee72d 100644
>> --- a/drivers/usb/dwc2/hcd.c
>> +++ b/drivers/usb/dwc2/hcd.c
>> @@ -2150,7 +2150,7 @@ static int dwc2_hcd_endpoint_disable(struct dwc2_hsotg *hsotg,
>> }
>>
>> spin_unlock_irqrestore(&hsotg->lock, flags);
>> - usleep_range(20000, 40000);
>> + msleep(20);
>> spin_lock_irqsave(&hsotg->lock, flags);
>> qh = ep->hcpriv;
>> if (!qh) {
>> @@ -3240,7 +3240,7 @@ static void dwc2_conn_id_status_change(struct work_struct *work)
>> "Waiting for Peripheral Mode, Mode=%s\n",
>> dwc2_is_host_mode(hsotg) ? "Host" :
>> "Peripheral");
>> - usleep_range(20000, 40000);
>> + msleep(20);
>> if (++count > 250)
>> break;
>> }
>> @@ -3261,7 +3261,7 @@ static void dwc2_conn_id_status_change(struct work_struct *work)
>> dev_info(hsotg->dev, "Waiting for Host Mode, Mode=%s\n",
>> dwc2_is_host_mode(hsotg) ?
>> "Host" : "Peripheral");
>> - usleep_range(20000, 40000);
>> + msleep(20);
>> if (++count > 250)
>> break;
>> }
>> @@ -3354,7 +3354,7 @@ static void dwc2_port_suspend(struct dwc2_hsotg *hsotg, u16 windex)
>>
>> spin_unlock_irqrestore(&hsotg->lock, flags);
>>
>> - usleep_range(200000, 250000);
>> + msleep(200);
>> } else {
>> spin_unlock_irqrestore(&hsotg->lock, flags);
>> }
>> @@ -3378,7 +3378,7 @@ static void dwc2_port_resume(struct dwc2_hsotg *hsotg)
>> pcgctl &= ~PCGCTL_STOPPCLK;
>> dwc2_writel(pcgctl, hsotg->regs + PCGCTL);
>> spin_unlock_irqrestore(&hsotg->lock, flags);
>> - usleep_range(20000, 40000);
>> + msleep(20);
>> spin_lock_irqsave(&hsotg->lock, flags);
>> }
>>
>> @@ -3691,7 +3691,7 @@ static int dwc2_hcd_hub_control(struct dwc2_hsotg *hsotg, u16 typereq,
>> }
>>
>> /* Clear reset bit in 10ms (FS/LS) or 50ms (HS) */
>> - usleep_range(50000, 70000);
>> + msleep(50);
>> hprt0 &= ~HPRT0_RST;
>> dwc2_writel(hprt0, hsotg->regs + HPRT0);
>> hsotg->lx_state = DWC2_L0; /* Now back to On state */
>>
>
> +Felipe
>
> Acked-by: John Youn <johnyoun@xxxxxxxxxxxx>
>
> I've also fixed this up locally to apply against recent dwc2 patches
> for next.
>
> Hi Felipe,
>
> If/when you queue the pending dwc2 patches on testing/next I can
> resend this to you.
it actually applied just fine ;-)
--
balbi
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