Hi,
On 12/29/2016 07:00 PM, Felipe Balbi wrote:
> Many other bits in USBSTS register are "clear-by-writing-1". Let's make
> sure that we clear *only* STS_EINT and not any of the other bits as they
> might be needed later.
Bit 13~31 in status register is for RsvdP (Reserved and Preserved).
This means these bits are reserved for future RW implementations.
Software shall preserve the value read for writes.
How about below helper?
static inline void clear_status_rw1c_bit(u32 bit)
{
u32 status;
status = readl(&xhci->op_regs->status);
/* preserve RsvP bits and clear RO/RW1C/RsvZ bits */
status &= ~0x1fff;
status |= bit;
writel(status, &xhci->op_regs->status);
}
Look into the code, I still find other two places where RW1C bits
are not cleared correctly.
In xhci_stop() and xhci_resume(), the RW1C bit is treated as a RW type.
724 temp = readl(&xhci->op_regs->status);
725 writel(temp & ~STS_EINT, &xhci->op_regs->status);
I will correct these in a separated patch and cc stable as well.
Best regards,
Lu Baolu
>
> Signed-off-by: Felipe Balbi <felipe.balbi@xxxxxxxxxxxxxxx>
> ---
> drivers/usb/host/xhci-ring.c | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c
> index b4ec80d18078..116b4a0dadbb 100644
> --- a/drivers/usb/host/xhci-ring.c
> +++ b/drivers/usb/host/xhci-ring.c
> @@ -2630,8 +2630,7 @@ irqreturn_t xhci_irq(struct usb_hcd *hcd)
> * so we can receive interrupts from other MSI-X interrupters.
> * Write 1 to clear the interrupt status.
> */
> - status |= STS_EINT;
> - writel(status, &xhci->op_regs->status);
> + writel(STS_EINT, &xhci->op_regs->status);
> /* FIXME when MSI-X is supported and there are multiple vectors */
> /* Clear the MSI-X event interrupt status */
>
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