On Wed, 30 Mar 2016, Lipengcheng wrote:
> Hi,
> > The ohci-platform and ehci-platform drivers already perform their own root-hub and bus resets.
> I don't understand the sentence clearly.
>
> Synopsis control VERSION： DesignWare Cores USB2.0 Host-AHB Controller, Version 2.98a
> The synopsis has the three source clocks for EHCI Host Controller implementation:
> A, System (AHB BIU) Clock
> B, PHY Clock(BUS clock)
> C, UTMI PHY Clock(per port)
>
> A clock corresponding to a reset,
No, it doesn't. Clocks and resets are different things.
> so the ehci control should have the
> same number reset. We are ready to put the utmi phy clock and utmi
> reset into the phy module. The ehci-platform is on the lack of a
> reset number.
I don't know why you think ehci-platform doesn't have a reset. Just
look near the start of the ehci-platform.c source file:
struct ehci_platform_priv {
struct clk *clks[EHCI_MAX_CLKS];
struct reset_control *rst;
...
Alan Stern
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