Kever, On Sun, Jan 31, 2016 at 1:23 AM, Kever Yang <kever.yang@xxxxxxxxxxxxxx> wrote: > Doug, > > On 01/29/2016 10:20 AM, Douglas Anderson wrote: >> >> According to the most up to date version of the dwc2 databook, the FRINT >> field of the HFIR register should be programmed to: >> * 125 us * (PHY clock freq for HS) - 1 >> * 1000 us * (PHY clock freq for FS/LS) - 1 > > I got 3 version of dwc_otg databook, 2.74a, 2.94a and 3.10a, > all the doc describe the FrInt as: Can you check to see if you can get 3.30a (October 2015)? > * 125 us * (PHY clock freq for HS) > * 1000 us * (PHY clock freq for FS/LS) > > Maybe John can help to check the design. Yes, this really needs John or someone at Synopsys. > There are some feature different in new and old version, but not sure > if this is one of then. > > The doc says If no value is programmed, the corecalculates the value > based on the PHY clock specified in the FS/LS PHY Clock select field of > Host configuration register(HCFG.FLSLPclkSel), does this work? It seems to. It looks like that's what makes our firmware work. I'm not 100% sure if there are any downsides to that approach... -Doug -- To unsubscribe from this list: send the line "unsubscribe linux-usb" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
