Re: 64 byte EP0 OUT data transfer issue on Chipidea highspeed dual role controller

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On Fri, Jun 26, 2015 at 8:44 PM, David Laight <David.Laight@xxxxxxxxxx> wrote:
> From: Steve Calfee
>> Sent: 26 June 2015 15:59
>> > On the host (Wandboard iMX6q) the test app opens /dev/hidraw0 and
>> > write 64 bytes with report ID (1). The HID device has no Interrupt OUT
>> > ep, therefore uses control endpoint ep0 for the 64 bytes transfer to
>> > gadget (Wandboard iMX6q) using set_report.
>> >
>> > The setup phase is OK and the 64 bytes is written to gadget. However
>> > the chipidea interrupt (ci_irq()) and resulting udc interrupt
>> > (udc_irq()) is invoked. This indicates that the 64 bytes transaction
>> > is not completed over ep0 from host to gadget.
>> >
>> > **this issue is reproducible for all data transfers that aligns on 64 bytes**
>> >
>> > ~jayan
>> >
>> Hi Jayan,
>>
>> This sounds like a Zero Length Transfer issue. This applies to any
>> endpoint including EP0.
>>
>> A ZLT is needed to end any transfer IFF the length is not already
>> known by the protocol. So if the hid URB requests say 1024 bytes and
>> the gadget only has 64, it must first send the 64 byte maxpacket and
>> then send a zero length packet. This way the host knows the transfer
>> is complete.
>
> Is this using the xhci driver?
> The ZLP sending code used to be broken.
> A couple of patches have been submitted but I don't remember one being applied.
>
>         David
>

Thanks for the pointers. This is not using the xhci driver.

- This is a ep0 OUT transfer. Does the host need to add a ZLP for 64
byte aligned data transfer?
 - Is it not expected for the completion interrupt be raised on
receiving the 64 bytes of data, irrespective of whether or not  a ZLP
has been sent.

~Jayan
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