Hi, On Fri, Oct 10, 2014 at 05:25:34PM +0800, Huang Rui wrote: > > > I enabled dwc3 and gadget debug/verbose configuration, the whole testing dmesg > > > > oh, that's why it's so slow :-) I'm getting over 30MB/sec with a Cortex > > A9 :-) > > > > Yes, maybe have two reasons: > 1) The input clock is much slower than SOC's. > 2) I used high speed mode. right, i'm running at highspeed too. > Because of the timing issue on FPGA, bulk write transfer would get > stuck when use more than 1MB (can pass on small file write) on super > speed mode. (Gadget Zero failed on 1/3/5/7 with 10s timeout) These shouldn't fail. I'll leave testusb running tonight. > > > Do you want to see the whole testing dmesg, with which debug level > > > enablement? > > > > This is good for me, thank you. > > The test log with booting is attached. Please review. will do. > > ps: FYI, I left my board running overnight the same test. It has been > > pretty stable so far. > > > > High speed mode is stable in my FPGA board, but super speed is not > at current. weird. Got any logs ? If you want to share logs I can probably help you debugging that. -- balbi
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