Hi, On Thu, Aug 14, 2014 at 06:15:30PM +0000, Paul Zimmerman wrote: > > From: Felipe Balbi [mailto:balbi@xxxxxx] > > Sent: Thursday, August 14, 2014 8:00 AM > > To: Paul Zimmerman; Linux USB Mailing List > > Cc: George Cherian > > Subject: DWC3 xHCI suspend > > > > Hi Paul, > > > > We noticed that on some of our platforms XHCI takes longer to suspend > > and we only reach suspend if we set XHCI_SLOW_SUSPEND quirk. > > > > Do you have any idea what would make DWC3 (as host) take longer to > > complete STS_HALT command ? > > > > thanks > > Hi Felipe, > > This is the first time I have heard of such an issue with our host. > When you say "some of our platforms", do you mean different SOCs? yeah, it was caught at least on AM437x, though I'm unsure if that path has been very well exercised on all SoCs. > I can speculate that the controller is trying to write back some > internal state to memory before suspending. Do these systems have > a slower memory bus? Or maybe something in the suspend process is DDR3 @400MHz, same as all other boards. > blocking the controller's access to memory? hmmm, that could be the case, yeah. Gotta figure out a way to prove (or disprove) that though -- balbi
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