Hello. On 05/24/2014 11:22 AM, Daniel Mack wrote:
I I'd say it's not supposed to. I just wanted the bit to be 0 when writing back the CSR.
You failed to achieve that since you forgot ~; you're clearing all bits but this one.
Ouch, totally missed that, thanks!
And I've missed CSR0 thing at first, so we have a tie. :-)
diff --git a/drivers/usb/musb/musb_host.c b/drivers/usb/musb/musb_host.c index f98a7c0..9d3a5b2 100644 --- a/drivers/usb/musb/musb_host.c +++ b/drivers/usb/musb/musb_host.c @@ -120,7 +120,8 @@ static void musb_h_tx_flush_fifo(struct musb_hw_ep *ep) if (csr != lastcsr) dev_dbg(musb->controller, "Host TX FIFONOTEMPTY csr: %02x\n", csr); lastcsr = csr; - csr |= MUSB_TXCSR_FLUSHFIFO; + csr &= MUSB_TXCSR_H_RXSTALL; + csr |= MUSB_TXCSR_FLUSHFIFO | MUSB_CSR0_TXPKTRDY;
Yes, the manual tells us to set TxPktRdy along with FlushFIFO. This has been a long standing bug, perhaps because the old versions of the MUSBHDRC manuals didn't mention that.
Ok. I'll drop the RXSTALL thing from the patch. It's also unrelated the issue that I've seen, so let's not touch the bit here at all.
Thanks.
musb_writew(epio, MUSB_TXCSR, csr); csr = musb_readw(epio, MUSB_TXCSR);
Another possible bug here is not flushing the second FIFO in the double-buffered mode...
Hmm, ok. I'll not make that part of this patch though, I'd say. Would you like to follow up with a patch for that?
I don't have access to any MUSB hardware now (and when I had, it didn't have double buffered endpoints), so I wouldn't be able to test such a patch. Looking a bit more at the code, now it seems it already can handle that situation...
Again, thanks for you review! Daniel
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