RE: [PATCH 2/7] usb: s3c-hsotg: Move s3c-hsotg into dwc2 folder

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> From: dinguyen@xxxxxxxxxx [mailto:dinguyen@xxxxxxxxxx]
> Sent: Thursday, February 13, 2014 1:11 PM
> 
> Moves the s3c-hsotg driver into the dwc2 folder and use the dwc2 defines in
> hw.h. The s3c-hostg driver will now be built with a kconfig option under
> the dwc2 kconfig. USB_DWC2_HOST and USB_S3C_HSOTG are mutually exclusive
> build options.

< snip >

> diff --git a/drivers/usb/dwc2/Makefile b/drivers/usb/dwc2/Makefile
> index 11529d3..c4b2132 100644
> --- a/drivers/usb/dwc2/Makefile
> +++ b/drivers/usb/dwc2/Makefile
> @@ -1,9 +1,15 @@
>  ccflags-$(CONFIG_USB_DWC2_DEBUG)	+= -DDEBUG
>  ccflags-$(CONFIG_USB_DWC2_VERBOSE)	+= -DVERBOSE_DEBUG
> 
> +ifeq ($(CONFIG_USB_DWC2_HOST),y)
>  obj-$(CONFIG_USB_DWC2)			+= dwc2.o
> +dwc2-y                                  += core.o core_intr.o
> +dwc2-y                                  += hcd.o hcd_intr.o
> +dwc2-y                                  += hcd_queue.o hcd_ddma.o
> +endif
> +obj-$(CONFIG_USB_S3C_HSOTG)             += s3c_hsotg.o

You have whitespace damage here (spaces instead of tabs).

> +s3c_hsotg-y				+= s3c-hsotg.o
> 
> -dwc2-y					+= core.o core_intr.o
> 
>  # NOTE: This driver at present only implements the Host mode
>  # of the controller. The existing s3c-hsotg driver supports
> @@ -13,13 +19,12 @@ dwc2-y					+= core.o core_intr.o
>  # that is done, Host mode will become an optional feature that
>  # is selected with a config option.
> 
> -dwc2-y					+= hcd.o hcd_intr.o
> -dwc2-y					+= hcd_queue.o hcd_ddma.o
> -
>  ifneq ($(CONFIG_PCI),)
>  	obj-$(CONFIG_USB_DWC2)		+= dwc2_pci.o
>  endif
> -obj-$(CONFIG_USB_DWC2)			+= dwc2_platform.o
> +ifneq ($(CONFIG_USB_DWC2_HOST),)
> +	obj-$(CONFIG_USB_DWC2)			+= dwc2_platform.o
> +endif
> 
>  dwc2_pci-y				+= pci.o
>  dwc2_platform-y				+= platform.o
> diff --git a/drivers/usb/gadget/s3c-hsotg.c b/drivers/usb/dwc2/s3c-hsotg.c
> similarity index 91%
> rename from drivers/usb/gadget/s3c-hsotg.c
> rename to drivers/usb/dwc2/s3c-hsotg.c
> index 1172eae..21cd3d6 100644
> --- a/drivers/usb/gadget/s3c-hsotg.c
> +++ b/drivers/usb/dwc2/s3c-hsotg.c
> @@ -37,7 +37,7 @@
>  #include <linux/usb/phy.h>
>  #include <linux/platform_data/s3c-hsotg.h>
> 
> -#include "s3c-hsotg.h"
> +#include "hw.h"
> 
>  static const char * const s3c_hsotg_supply_names[] = {
>  	"vusb_d",		/* digital USB supply, 1.2V */
> @@ -340,8 +340,8 @@ static void s3c_hsotg_init_fifo(struct s3c_hsotg *hsotg)
>  	/* set FIFO sizes to 2048/1024 */
> 
>  	writel(2048, hsotg->regs + GRXFSIZ);
> -	writel(GNPTXFSIZ_NPTxFStAddr(2048) |
> -	       GNPTXFSIZ_NPTxFDep(1024),
> +	writel(DPTXFSIZN_DPTXFADDR(2048) |
> +	       DPTXFSIZN_DPTXFSIZE(1024),
>  	       hsotg->regs + GNPTXFSIZ);

You are using the DPTXF macros to access the GNPTXF register. That's
not a good idea. Use the generic FIFOSIZE macros instead.

< snip >

> @@ -1652,24 +1652,24 @@ static void s3c_hsotg_handle_rx(struct s3c_hsotg *hsotg)
>  
>  	WARN_ON(using_dma(hsotg));
>  
> -	epnum = grxstsr & GRXSTS_EPNum_MASK;
> -	status = grxstsr & GRXSTS_PktSts_MASK;
> +	epnum = grxstsr & GRXSTS_EPNUM_MASK;
> +	status = grxstsr & GRXSTS_PKTSTS_MASK;
>  
> -	size = grxstsr & GRXSTS_ByteCnt_MASK;
> -	size >>= GRXSTS_ByteCnt_SHIFT;
> +	size = grxstsr & GRXSTS_BYTECNT_MASK;
> +	size >>= GRXSTS_BYTECNT_SHIFT;
>  
>  	if (1)
>  		dev_dbg(hsotg->dev, "%s: GRXSTSP=0x%08x (%d@%d)\n",
>  			__func__, grxstsr, size, epnum);
>
> -#define __status(x) ((x) >> GRXSTS_PktSts_SHIFT)
> +#define __status(x) ((x) >> GRXSTS_PKTSTS_SHIFT)
> -	switch (status >> GRXSTS_PktSts_SHIFT) {
> -	case __status(GRXSTS_PktSts_GlobalOutNAK):

Here is where you should change the code to use the DWC2 definitions of
the GRXSTS_PKTSTS values. It simplifies the code, too. Something like:

	switch ((status & GRXSTS_PKTSTS_MASK) >> GRXSTS_PKTSTS_SHIFT) {
	case GRXSTS_PKTSTS_GLOBALOUTNAK:

etc.

< snip >

> @@ -3173,8 +3173,8 @@ static void s3c_hsotg_initep(struct s3c_hsotg *hsotg,
>  	 * code is changed to make each endpoint's direction changeable.
>  	 */
>  
> -	ptxfifo = readl(hsotg->regs + DPTXFSIZn(epnum));
> -	hs_ep->fifo_size = DPTXFSIZn_DPTxFSize_GET(ptxfifo) * 4;
> +	ptxfifo = readl(hsotg->regs + DPTXFSIZN(epnum));
> +	hs_ep->fifo_size = DPTXFSIZN_DPTXFSIZE_GET(ptxfifo) * 4;

Here is where you should use the newly-defined FIFOSIZE_DEPTH_GET macro
that I mentioned in patch #1.

The rest of the patch looks OK to me.

-- 
Paul

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