Add OTG HNP and SRP operation functions implementation:
- charge vbus
- drive vbus
- connection signaling
- drive sof
- start data pulse
- add fsm timer
- delete fsm timer
- start host
- start gadget
Signed-off-by: Li Jun <b47624@xxxxxxxxxxxxx>
---
drivers/usb/chipidea/bits.h | 11 ++
drivers/usb/chipidea/otg_fsm.c | 311 ++++++++++++++++++++++++++++++++++++++++
drivers/usb/chipidea/otg_fsm.h | 8 +
3 files changed, 330 insertions(+), 0 deletions(-)
diff --git a/drivers/usb/chipidea/bits.h b/drivers/usb/chipidea/bits.h
index a857131..4347414 100644
--- a/drivers/usb/chipidea/bits.h
+++ b/drivers/usb/chipidea/bits.h
@@ -44,9 +44,14 @@
#define DEVICEADDR_USBADR (0x7FUL << 25)
/* PORTSC */
+#define PORTSC_CCS BIT(0)
+#define PORTSC_CSC BIT(1)
+#define PORTSC_PEC BIT(3)
+#define PORTSC_OCC BIT(5)
#define PORTSC_FPR BIT(6)
#define PORTSC_SUSP BIT(7)
#define PORTSC_HSP BIT(9)
+#define PORTSC_PP BIT(12)
#define PORTSC_PTC (0x0FUL << 16)
#define PORTSC_PHCD(d) ((d) ? BIT(22) : BIT(23))
/* PTS and PTW for non lpm version only */
@@ -55,6 +60,9 @@
#define PORTSC_PTW BIT(28)
#define PORTSC_STS BIT(29)
+#define PORTSC_W1C_BITS \
+ (PORTSC_CSC | PORTSC_PEC | PORTSC_OCC)
+
/* DEVLC */
#define DEVLC_PSPD (0x03UL << 25)
#define DEVLC_PSPD_HS (0x02UL << 25)
@@ -69,7 +77,10 @@
#define PTS_HSIC 4
/* OTGSC */
+#define OTGSC_VD BIT(0)
+#define OTGSC_VC BIT(1)
#define OTGSC_IDPU BIT(5)
+#define OTGSC_HADP BIT(6)
#define OTGSC_ID BIT(8)
#define OTGSC_AVV BIT(9)
#define OTGSC_ASV BIT(10)
diff --git a/drivers/usb/chipidea/otg_fsm.c b/drivers/usb/chipidea/otg_fsm.c
index 1f8907d..31a046d 100644
--- a/drivers/usb/chipidea/otg_fsm.c
+++ b/drivers/usb/chipidea/otg_fsm.c
@@ -19,12 +19,322 @@
#include <linux/usb/otg-fsm.h>
#include <linux/usb/gadget.h>
#include <linux/usb/chipidea.h>
+#include <linux/regulator/consumer.h>
#include "ci.h"
#include "bits.h"
#include "otg.h"
#include "otg_fsm.h"
+static struct list_head active_timers;
+
+#define HA_DATA_PULSE 1
+
+/* FSM timers */
+struct ci_otg_fsm_timer *a_wait_vrise_tmr, *a_wait_vfall_tmr, *a_wait_bcon_tmr,
+ *a_aidl_bdis_tmr, *a_bidl_adis_tmr, *b_ase0_brst_tmr,
+ *b_se0_srp_tmr, *b_srp_fail_tmr, *b_data_pulse_tmr;
+
+/* Add timer to timer list */
+void ci_otg_add_timer(struct ci_hdrc *ci, struct ci_otg_fsm_timer *gtimer)
+{
+ struct ci_otg_fsm_timer *timer = gtimer;
+ struct ci_otg_fsm_timer *tmp_timer;
+
+ /* Check if the timer is already in the active list,
+ * if so update timer count
+ */
+ list_for_each_entry(tmp_timer, &active_timers, list)
+ if (tmp_timer == timer) {
+ timer->count = timer->expires;
+ return;
+ }
+
+ timer->count = timer->expires;
+ list_add_tail(&timer->list, &active_timers);
+
+ /* enable 1ms irq in otgsc */
+ if (!(hw_read(ci, OP_OTGSC, OTGSC_1MSIE))) {
+ hw_write(ci, OP_OTGSC, OTGSC_INT_STATUS_BITS | OTGSC_1MSIE,
+ OTGSC_1MSIE);
+ }
+}
+
+static struct ci_otg_fsm_timer *ci_otg_get_timer(enum otg_fsm_timer t)
+{
+ struct ci_otg_fsm_timer *timer;
+
+ /* REVISIT: use array of pointers to timers instead */
+ switch (t) {
+ case A_WAIT_VRISE:
+ timer = a_wait_vrise_tmr;
+ break;
+ case A_WAIT_VFALL:
+ timer = a_wait_vfall_tmr;
+ break;
+ case A_WAIT_BCON:
+ timer = a_wait_bcon_tmr;
+ break;
+ case A_AIDL_BDIS:
+ timer = a_aidl_bdis_tmr;
+ break;
+ case A_BIDL_ADIS:
+ timer = a_bidl_adis_tmr;
+ break;
+ case B_ASE0_BRST:
+ timer = b_ase0_brst_tmr;
+ break;
+ case B_SE0_SRP:
+ timer = b_se0_srp_tmr;
+ break;
+ case B_SRP_FAIL:
+ timer = b_srp_fail_tmr;
+ break;
+ default:
+ timer = NULL;
+ }
+
+ return timer;
+}
+
+static void ci_otg_fsm_add_timer(struct otg_fsm *fsm, enum otg_fsm_timer t)
+{
+ struct ci_otg_fsm_timer *timer;
+ struct ci_hdrc *ci = container_of(fsm->otg->gadget,
+ struct ci_hdrc, gadget);
+
+ timer = ci_otg_get_timer(t);
+ if (!timer)
+ return;
+
+ ci_otg_add_timer(ci, timer);
+}
+
+/* Remove timer from the timer list; clear timeout status */
+void ci_otg_del_timer(struct ci_hdrc *ci, struct ci_otg_fsm_timer *gtimer)
+{
+ struct ci_otg_fsm_timer *timer = gtimer;
+ struct ci_otg_fsm_timer *tmp_timer, *del_tmp;
+ int flag = 0;
+
+ list_for_each_entry_safe(tmp_timer, del_tmp, &active_timers, list)
+ if (tmp_timer == timer) {
+ list_del(&timer->list);
+ flag = 1;
+ }
+
+ /* disable 1ms irq if there is no any timer active */
+ if ((flag == 1) && list_empty(&active_timers)) {
+ hw_write(ci, OP_OTGSC,
+ OTGSC_INT_STATUS_BITS | OTGSC_1MSIE, 0);
+ }
+}
+
+static void ci_otg_fsm_del_timer(struct otg_fsm *fsm, enum otg_fsm_timer t)
+{
+ struct ci_otg_fsm_timer *timer;
+ struct ci_hdrc *ci = container_of(fsm->otg->gadget,
+ struct ci_hdrc, gadget);
+
+ timer = ci_otg_get_timer(t);
+ if (!timer)
+ return;
+
+ ci_otg_del_timer(ci, timer);
+}
+
+/* Reduce timer count by 1, and find timeout conditions.
+ * Called by otg 1ms timer interrupt
+ */
+int ci_otg_tick_timer(struct ci_hdrc *ci)
+{
+ struct ci_otg_fsm_timer *tmp_timer, *del_tmp;
+ int expired = 0;
+
+ list_for_each_entry_safe(tmp_timer, del_tmp, &active_timers, list) {
+ tmp_timer->count--;
+ /* check if timer expires */
+ if (!tmp_timer->count) {
+ list_del(&tmp_timer->list);
+ tmp_timer->function(ci, tmp_timer->data);
+ expired = 1;
+ }
+ }
+
+ /* disable 1ms irq if there is no any timer active */
+ if ((expired == 1) && list_empty(&active_timers)) {
+ hw_write(ci, OP_OTGSC,
+ OTGSC_INT_STATUS_BITS | OTGSC_1MSIE, 0);
+ }
+
+ return expired;
+}
+
+/* -------------------------------------------------------------*/
+/* Operations that will be called from OTG Finite State Machine */
+
+/* Charge vbus for vbus pulsing in SRP */
+void ci_otg_chrg_vbus(struct otg_fsm *fsm, int on)
+{
+ struct ci_hdrc *ci = container_of(fsm->otg->gadget,
+ struct ci_hdrc, gadget);
+
+ if (on)
+ /* stop discharging, start charging */
+ hw_write(ci, OP_OTGSC,
+ OTGSC_INT_STATUS_BITS | OTGSC_VD | OTGSC_VC,
+ OTGSC_VC);
+ else
+ /* stop charging */
+ hw_write(ci, OP_OTGSC,
+ OTGSC_INT_STATUS_BITS | OTGSC_VC, 0);
+}
+
+/* A-device driver vbus, controlled through PP bit in PORTSC */
+void ci_otg_drv_vbus(struct otg_fsm *fsm, int on)
+{
+ int ret;
+ struct ci_hdrc *ci = container_of(fsm->otg->gadget,
+ struct ci_hdrc, gadget);
+
+ if (on) {
+ hw_write(ci, OP_PORTSC, PORTSC_W1C_BITS | PORTSC_PP,
+ PORTSC_PP);
+ if (ci->platdata->reg_vbus) {
+ ret = regulator_enable(ci->platdata->reg_vbus);
+ if (ret) {
+ dev_err(ci->dev,
+ "Failed to enable vbus regulator, ret=%d\n",
+ ret);
+ return;
+ }
+ }
+ /* Disable data pulse irq */
+ hw_write(ci, OP_OTGSC,
+ OTGSC_INT_STATUS_BITS | OTGSC_DPIE, 0);
+ } else {
+ if (ci->platdata->reg_vbus)
+ regulator_disable(ci->platdata->reg_vbus);
+ hw_write(ci, OP_PORTSC, PORTSC_W1C_BITS | PORTSC_PP, 0);
+ }
+}
+
+/*
+ * Control data line through Run Stop bit.
+ */
+void ci_otg_loc_conn(struct otg_fsm *fsm, int on)
+{
+ struct ci_hdrc *ci = container_of(fsm->otg->gadget,
+ struct ci_hdrc, gadget);
+
+ if (on)
+ hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS);
+ else
+ hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
+}
+
+/*
+ * Generate SOF by host. This is controlled through suspend/resume the
+ * port. In host mode, controller will automatically send SOF.
+ * Suspend will block the data on the port.
+ */
+void ci_otg_loc_sof(struct otg_fsm *fsm, int on)
+{
+ struct ci_hdrc *ci = container_of(fsm->otg->gadget,
+ struct ci_hdrc, gadget);
+
+ if (on)
+ hw_write(ci, OP_PORTSC, PORTSC_W1C_BITS | PORTSC_FPR,
+ PORTSC_FPR);
+ else
+ hw_write(ci, OP_PORTSC, PORTSC_W1C_BITS | PORTSC_SUSP,
+ PORTSC_SUSP);
+}
+
+/* Start SRP pulsing by data-line pulsing, no v-bus pulsing followed. */
+void ci_otg_start_pulse(struct otg_fsm *fsm)
+{
+ struct ci_hdrc *ci = container_of(fsm->otg->gadget,
+ struct ci_hdrc, gadget);
+
+#ifdef HA_DATA_PULSE
+ hw_write(ci, OP_OTGSC, OTGSC_INT_STATUS_BITS | OTGSC_HADP,
+ OTGSC_HADP);
+#else
+ ci_otg_loc_conn(fsm, 1);
+#endif
+ ci_otg_add_timer(ci, b_data_pulse_tmr);
+}
+
+/*
+ * Here use this chance to enable data pulse irq for A device
+ * in a_idle state since ADP is not supported.
+ */
+void ci_otg_start_adp_prb(struct otg_fsm *fsm)
+{
+ struct ci_hdrc *ci = container_of(fsm->otg->gadget,
+ struct ci_hdrc, gadget);
+
+ /* Clear exsiting DP irq */
+ hw_write(ci, OP_OTGSC, OTGSC_INT_STATUS_BITS, OTGSC_DPIS);
+ /* Enable data pulse irq */
+ hw_write(ci, OP_OTGSC, OTGSC_INT_STATUS_BITS | OTGSC_DPIE,
+ OTGSC_DPIE);
+}
+
+int ci_otg_start_host(struct otg_fsm *fsm, int on)
+{
+ struct ci_hdrc *ci = container_of(fsm->otg->gadget,
+ struct ci_hdrc, gadget);
+
+ mutex_unlock(&fsm->lock);
+ if (on) {
+ if (ci->role != CI_ROLE_HOST) {
+ ci_role_stop(ci);
+ ci_role_start(ci, CI_ROLE_HOST);
+ }
+ } else {
+ if (ci->role == CI_ROLE_HOST) {
+ ci_role_stop(ci);
+ ci_role_start(ci, CI_ROLE_GADGET);
+ }
+ }
+ mutex_lock(&fsm->lock);
+ return 0;
+}
+
+int ci_otg_start_gadget(struct otg_fsm *fsm, int on)
+{
+ struct ci_hdrc *ci = container_of(fsm->otg->gadget,
+ struct ci_hdrc, gadget);
+
+ mutex_unlock(&fsm->lock);
+ if (on) {
+ if (ci->role == CI_ROLE_GADGET)
+ usb_gadget_vbus_connect(&ci->gadget);
+ } else {
+ if (ci->role == CI_ROLE_GADGET)
+ usb_gadget_vbus_disconnect(&ci->gadget);
+ }
+ mutex_lock(&fsm->lock);
+ return 0;
+}
+
+static struct otg_fsm_ops ci_otg_ops = {
+ .chrg_vbus = ci_otg_chrg_vbus,
+ .drv_vbus = ci_otg_drv_vbus,
+ .loc_conn = ci_otg_loc_conn,
+ .loc_sof = ci_otg_loc_sof,
+ .start_pulse = ci_otg_start_pulse,
+ .start_adp_prb = ci_otg_start_adp_prb,
+
+ .add_timer = ci_otg_fsm_add_timer,
+ .del_timer = ci_otg_fsm_del_timer,
+
+ .start_host = ci_otg_start_host,
+ .start_gadget = ci_otg_start_gadget,
+};
+
int ci_hdrc_otg_fsm_init(struct ci_hdrc *ci)
{
if (ci->transceiver == NULL)
@@ -52,6 +362,7 @@ int ci_hdrc_otg_fsm_init(struct ci_hdrc *ci)
ci->fsm->otg->phy = ci->transceiver;
ci->fsm->otg->gadget = &ci->gadget;
ci->transceiver->state = OTG_STATE_UNDEFINED;
+ ci->fsm->ops = &ci_otg_ops;
mutex_init(&ci->fsm->lock);
diff --git a/drivers/usb/chipidea/otg_fsm.h b/drivers/usb/chipidea/otg_fsm.h
index 1a7ca11..e1b45d7 100644
--- a/drivers/usb/chipidea/otg_fsm.h
+++ b/drivers/usb/chipidea/otg_fsm.h
@@ -11,6 +11,14 @@
#ifndef __DRIVERS_USB_CHIPIDEA_OTG_FSM_H
#define __DRIVERS_USB_CHIPIDEA_OTG_FSM_H
+struct ci_otg_fsm_timer {
+ unsigned long expires; /* Number of count increase to timeout */
+ unsigned long count; /* Tick counter */
+ void (*function)(void *, unsigned long); /* Timeout function */
+ unsigned long data; /* Data passed to function */
+ struct list_head list;
+};
+
#ifdef CONFIG_USB_OTG_FSM
int ci_hdrc_otg_fsm_init(struct ci_hdrc *ci);
--
1.7.8
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