Re: [tip:locking/core] tools/memory-model: Add extra ordering for locks and remove it for ordinary release/acquire
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- Subject: Re: [tip:locking/core] tools/memory-model: Add extra ordering for locks and remove it for ordinary release/acquire
- From: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
- Date: Fri, 10 Sep 2021 11:33:25 +0200
- Cc: Dan Lustig <dlustig@xxxxxxxxxx>, Will Deacon <will@xxxxxxxxxx>, Linus Torvalds <torvalds@xxxxxxxxxxxxxxxxxxxx>, Alan Stern <stern@xxxxxxxxxxxxxxxxxxx>, Alexander Shishkin <alexander.shishkin@xxxxxxxxxxxxxxx>, Peter Anvin <hpa@xxxxxxxxx>, Andrea Parri <parri.andrea@xxxxxxxxx>, Ingo Molnar <mingo@xxxxxxxxxx>, "Paul E. McKenney" <paulmck@xxxxxxxxxx>, Vince Weaver <vincent.weaver@xxxxxxxxx>, Thomas Gleixner <tglx@xxxxxxxxxxxxx>, Jiri Olsa <jolsa@xxxxxxxxxx>, Arnaldo Carvalho de Melo <acme@xxxxxxxxxx>, Linux Kernel Mailing List <linux-kernel@xxxxxxxxxxxxxxx>, Stephane Eranian <eranian@xxxxxxxxxx>, linux-tip-commits@xxxxxxxxxxxxxxx, palmer@xxxxxxxxxxx, paul.walmsley@xxxxxxxxxx, mpe@xxxxxxxxxxxxxx
- In-reply-to: <YTqgSmX57l2hCMk0@boqun-archlinux>
- References: <20180926182920.27644-2-paulmck@linux.ibm.com> <tip-6e89e831a90172bc3d34ecbba52af5b9c4a447d1@git.kernel.org> <YTiXyiA92dM9726M@hirez.programming.kicks-ass.net> <YTiiC1mxzHyUJ47F@hirez.programming.kicks-ass.net> <20210908144217.GA603644@rowland.harvard.edu> <CAHk-=wiXJygbW+_1BdSX6M8j6z4w8gRSHVcaD5saihaNJApnoQ@mail.gmail.com> <YTm26u9i3hpjrNpr@hirez.programming.kicks-ass.net> <20210909133535.GA9722@willie-the-truck> <5412ab37-2979-5717-4951-6a61366df0f2@nvidia.com> <YTqgSmX57l2hCMk0@boqun-archlinux>
On Fri, Sep 10, 2021 at 08:01:14AM +0800, Boqun Feng wrote:
> On Thu, Sep 09, 2021 at 01:03:18PM -0400, Dan Lustig wrote:
> > On 9/9/2021 9:35 AM, Will Deacon wrote:
> > > On Thu, Sep 09, 2021 at 09:25:30AM +0200, Peter Zijlstra wrote:
> > >> The AMOSWAP is a RmW and as such matches the W from the RW->W fence,
> > >> similarly it marches the R from the R->RW fence, yielding an:
> > >>
> > >> RW-> W
> > >> RmW
> > >> R ->RW
> > >>
> > >> ordering. It's the stores S and R that can be re-ordered, but not the
> > >> sections themselves (same on PowerPC and many others).
> > I agree with Will here. If the AMOSWAP above is actually implemented with
> > a RISC-V AMO, then the two critical sections will be separated as if RW,RW,
> > as Peter described. If instead it's implemented using LR/SC, then RISC-V
>
> Just out of curiosity, in the following code, can the store S and load L
> be reordered?
>
> WRITE_ONCE(x, 1); // store S
> FENCE RW, W
> WRITE_ONCE(s.lock, 0); // unlock(s)
> AMOSWAP %0, 1, s.lock // lock(s)
> FENCE R, RW
> r1 = READ_ONCE(y); // load L
>
> I think they can, because neither "FENCE RW, W" nor "FENCE R, RW" order
> them.
I'm confused by your argument, per the above quoted section, those
fences and the AMO combine into a RW,RW ordering which is (as per the
later clarification) multi-copy-atomic, aka smp_mb().
As such, S and L are not allowed to be re-ordered in the given scenario.
> Note that the reordering is allowed in LKMM, because unlock-lock
> only need to be as strong as RCtso.
Risc-V is strictly stronger than required in this instance. Given the
current lock implementation. Daniel pointed out that if the atomic op
were LL/SC based instead of AMO it would end up being RCtso.
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