Commit-ID: bdf80d104021d3405e5ec8ecc08f189b74ae022a
Gitweb: http://git.kernel.org/tip/bdf80d104021d3405e5ec8ecc08f189b74ae022a
Author: Ingo Molnar <mingo@xxxxxxxxxx>
AuthorDate: Sat, 2 May 2015 10:22:45 +0200
Committer: Ingo Molnar <mingo@xxxxxxxxxx>
CommitDate: Tue, 19 May 2015 15:48:09 +0200
x86/fpu: Document the various fpregs state formats
Document all the structures that make up 'struct fpu'.
Cc: Andy Lutomirski <luto@xxxxxxxxxxxxxx>
Cc: Borislav Petkov <bp@xxxxxxxxx>
Cc: Dave Hansen <dave.hansen@xxxxxxxxxxxxxxx>
Cc: Fenghua Yu <fenghua.yu@xxxxxxxxx>
Cc: H. Peter Anvin <hpa@xxxxxxxxx>
Cc: Linus Torvalds <torvalds@xxxxxxxxxxxxxxxxxxxx>
Cc: Oleg Nesterov <oleg@xxxxxxxxxx>
Cc: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
Cc: Thomas Gleixner <tglx@xxxxxxxxxxxxx>
Signed-off-by: Ingo Molnar <mingo@xxxxxxxxxx>
---
arch/x86/include/asm/fpu/types.h | 35 +++++++++++++++++++++++++++++++++--
1 file changed, 33 insertions(+), 2 deletions(-)
diff --git a/arch/x86/include/asm/fpu/types.h b/arch/x86/include/asm/fpu/types.h
index 261cfb7..4c4eceb 100644
--- a/arch/x86/include/asm/fpu/types.h
+++ b/arch/x86/include/asm/fpu/types.h
@@ -4,6 +4,10 @@
#ifndef _ASM_X86_FPU_H
#define _ASM_X86_FPU_H
+/*
+ * The legacy x87 FPU state format, as saved by FSAVE and
+ * restored by the FRSTOR instructions:
+ */
struct fregs_state {
u32 cwd; /* FPU Control Word */
u32 swd; /* FPU Status Word */
@@ -16,10 +20,16 @@ struct fregs_state {
/* 8*10 bytes for each FP-reg = 80 bytes: */
u32 st_space[20];
- /* Software status information [not touched by FSAVE ]: */
+ /* Software status information [not touched by FSAVE]: */
u32 status;
};
+/*
+ * The legacy fx SSE/MMX FPU state format, as saved by FXSAVE and
+ * restored by the FXRSTOR instructions. It's similar to the FSAVE
+ * format, but differs in some areas, plus has extensions at
+ * the end for the XMM registers.
+ */
struct fxregs_state {
u16 cwd; /* Control Word */
u16 swd; /* Status Word */
@@ -56,7 +66,8 @@ struct fxregs_state {
} __attribute__((aligned(16)));
/*
- * Software based FPU emulation state:
+ * Software based FPU emulation state. This is arbitrary really,
+ * it matches the x87 format to make it easier to understand:
*/
struct swregs_state {
u32 cwd;
@@ -140,6 +151,14 @@ struct xstate_header {
u64 reserved[6];
} __attribute__((packed));
+/*
+ * This is our most modern FPU state format, as saved by the XSAVE
+ * and restored by the XRSTOR instructions.
+ *
+ * It consists of a legacy fxregs portion, an xstate header and
+ * subsequent fixed size areas as defined by the xstate header.
+ * Not all CPUs support all the extensions.
+ */
struct xregs_state {
struct fxregs_state i387;
struct xstate_header header;
@@ -150,6 +169,13 @@ struct xregs_state {
/* New processor state extensions will go here. */
} __attribute__ ((packed, aligned (64)));
+/*
+ * This is a union of all the possible FPU state formats
+ * put together, so that we can pick the right one runtime.
+ *
+ * The size of the structure is determined by the largest
+ * member - which is the xsave area:
+ */
union fpregs_state {
struct fregs_state fsave;
struct fxregs_state fxsave;
@@ -157,6 +183,11 @@ union fpregs_state {
struct xregs_state xsave;
};
+/*
+ * Highest level per task FPU state data structure that
+ * contains the FPU register state plus various FPU
+ * state fields:
+ */
struct fpu {
/*
* @state:
--
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