On Fri, May 15, 2015 at 2:39 AM, tip-bot for Ingo Molnar
<tipbot@xxxxxxxxx> wrote:
>
> We can pack function addresses tightly as well:
So I really want to see performance numbers on a few
microarchitectures for this one in particular.
The kernel generally doesn't have loops (well, not the kinds of
high-rep loops that tend to be worth aligning), and I think the
general branch/loop alignment is likely fine. But the function
alignment doesn't tend to have the same kind of I$ advantages, it's
more lilely purely a size issue and not as interesting. Function
targets are also more likely to be not in the cache, I suspect, since
you don't have a loop priming it or a short forward jump that just got
the cacheline anyway. And then *not* aligning the function would
actually tend to make it *less* dense in the I$.
Put another way: I suspect this is more likely to hurt, and less
likely to help than the others.
Size matters, but size matters mainly from an I$ standpoint, not from
some absolute 'big is bad" issue. Also, even when size matters,
performance matters too. I do want performance numbers. Is this
measurable?
Linus
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