On Wed, Feb 12, 2025 at 02:46:50PM +0000, Vishwaroop A wrote:
> Modify the chip select (CS) deactivation and inter-transfer delay
> execution to be performed only during the DATA_TRANSFER phase when
> the cs_change flag is not set. This ensures proper CS handling and
> timing between transfers while eliminating redundant operations.
>
> Fixes: 1b8342cc4a38 ("spi: tegra210-quad: combined sequence mode")
>
> Signed-off-by: Vishwaroop A <va@xxxxxxxxxx>
> ---
> drivers/spi/spi-tegra210-quad.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/spi/spi-tegra210-quad.c b/drivers/spi/spi-tegra210-quad.c
> index 2d7a2e3da337..04f41e92c1e2 100644
> --- a/drivers/spi/spi-tegra210-quad.c
> +++ b/drivers/spi/spi-tegra210-quad.c
> @@ -1171,16 +1171,16 @@ static int tegra_qspi_combined_seq_xfer(struct tegra_qspi *tqspi,
> ret = -EIO;
> goto exit;
> }
> - if (!xfer->cs_change) {
> - tegra_qspi_transfer_end(spi);
> - spi_transfer_delay_exec(xfer);
> - }
> break;
> default:
> ret = -EINVAL;
> goto exit;
> }
> msg->actual_length += xfer->len;
> + if (!xfer->cs_change && transfer_phase == DATA_TRANSFER) {
> + tegra_qspi_transfer_end(spi);
> + spi_transfer_delay_exec(xfer);
> + }
> transfer_phase++;
I'd prefer blank lines around the "if" block to make this less
cluttered, but since this was always like this, either way:
Acked-by: Thierry Reding <treding@xxxxxxxxxx>
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