AQR115c reports incorrect PMA capabilities which includes
10G/5G and also incorrectly disables capabilities like autoneg
and 10Mbps support.
AQR115c as per the Marvell databook supports speeds up to 2.5Gbps
with autonegotiation.
Fixes: 0ebc581f8a4b ("net: phy: aquantia: add support for aqr115c")
Link: https://lore.kernel.org/all/20240913011635.1286027-1-quic_abchauha@xxxxxxxxxxx/T/
Signed-off-by: Abhishek Chauhan <quic_abchauha@xxxxxxxxxxx>
---
Changes since v2
1. seperate out the changes into two different patches.
3. use phy_gbit_features instead of initializing each and
every link mode bits.
4. write seperate functions for 2.5Gbps supported phy
5. remove FIBRE bit which was introduced in patch 1
Changes since v1
1. remove usage of phy_set_max_speed in the aquantia driver code.
2. Introduce aqr_custom_get_feature which checks for the phy id and
takes necessary actions based on max_speed supported by the phy
3. remove aqr111_config_init as it is just a wrapper function.
drivers/net/phy/aquantia/aquantia_main.c | 28 ++++++++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/drivers/net/phy/aquantia/aquantia_main.c b/drivers/net/phy/aquantia/aquantia_main.c
index e982e9ce44a5..88ba12aaf6e0 100644
--- a/drivers/net/phy/aquantia/aquantia_main.c
+++ b/drivers/net/phy/aquantia/aquantia_main.c
@@ -767,6 +767,33 @@ static int aqr111_config_init(struct phy_device *phydev)
return aqr107_config_init(phydev);
}
+static int aqr115c_get_features(struct phy_device *phydev)
+{
+ int ret;
+ __ETHTOOL_DECLARE_LINK_MODE_MASK(supported) = { 0, };
+
+ /* Normal feature discovery */
+ ret = genphy_c45_pma_read_abilities(phydev);
+ if (ret)
+ return ret;
+
+ /* PHY FIXUP */
+ /* Although the PHY sets bit 12.18.19.48, it does not support 5G/10G modes */
+ linkmode_clear_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, phydev->supported);
+ linkmode_clear_bit(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, phydev->supported);
+ linkmode_clear_bit(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, phydev->supported);
+ linkmode_clear_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, phydev->supported);
+
+ /* Phy supports Speeds up to 2.5G with Autoneg though the phy PMA says otherwise */
+ linkmode_copy(supported, phy_gbit_features);
+ linkmode_set_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT, supported);
+ linkmode_set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, supported);
+
+ linkmode_or(phydev->supported, supported, phydev->supported);
+
+ return 0;
+}
+
static struct phy_driver aqr_driver[] = {
{
PHY_ID_MATCH_MODEL(PHY_ID_AQ1202),
@@ -1036,6 +1063,7 @@ static struct phy_driver aqr_driver[] = {
.get_sset_count = aqr107_get_sset_count,
.get_strings = aqr107_get_strings,
.get_stats = aqr107_get_stats,
+ .get_features = aqr115c_get_features,
.link_change_notify = aqr107_link_change_notify,
.led_brightness_set = aqr_phy_led_brightness_set,
.led_hw_is_supported = aqr_phy_led_hw_is_supported,
--
2.25.1
