On Thu, Apr 18, 2024 at 05:28:31PM +0530, Manivannan Sadhasivam wrote: > BME which stands for 'Bus Master Enable' is not defined in the PCIe base > spec even though it is commonly referred in many places (vendor docs). But > to align with the spec, let's rename it to its expansion 'Bus Master > Enable'. Thanks for doing this. I'm always in favor of using terms from the spec. > - dev_dbg(dev, "Received BME event. Link is enabled!\n"); > + dev_dbg(dev, "Received Bus Master Enable event. Link is enabled!\n"); Nothing to do with *this* patch, but this message reads a little weird to me because setting Bus Master Enable has nothing to do with link enablement. Also incidental: some of these messages and comments refer to a "Bus Master Enable *event*". Does "event" here refer to the act of the host setting the Bus Master Enable bit in the Command register? This is in qcom_pcie_ep_global_irq_thread(), so I assume there's something in the endpoint hardware that generates an IRQ when the Command register is written? > - * pci_epc_bme_notify() - Notify the EPF device that the EPC device has received > - * the BME event from the Root complex > - * @epc: the EPC device that received the BME event > + * pci_epc_bus_master_enable_notify() - Notify the EPF device that the EPC > + * device has received the Bus Master > + * Enable event from the Root complex > + * @epc: the EPC device that received the Bus Master Enable event > * > * Invoke to Notify the EPF device that the EPC device has received the Bus > - * Master Enable (BME) event from the Root complex > + * Master Enable event from the Root complex There's no "set Bus Master Enable" transaction that would appear on the PCIe link, so I assume "the Bus Master Enable event from the Root Complex" is a way of saying something like "host has written the Command register to set the Bus Master Enable bit"? Bjorn
