Re: [PATCH] spi: tegra210-quad: Fix iterator outside loop

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On Fri, Feb 24, 2023 at 04:50:00PM +0000, Krishna Yarlagadda wrote:

> > >  		msg->actual_length += xfer->len;
> > > +		if (!xfer->cs_change && transfer_phase == DATA_TRANSFER)
> > {
> > > +			tegra_qspi_transfer_end(spi);
> > > +			spi_transfer_delay_exec(xfer);
> > > +		}
> > >  		transfer_phase++;
> > >  	}
> > > -	if (!xfer->cs_change) {
> > > -		tegra_qspi_transfer_end(spi);
> > > -		spi_transfer_delay_exec(xfer);
> > > -	}

> > This looks like it'll do the wrong thing and do a change on every
> > transfer if cs_change isn't set?

> This condition is hit only in data phase which is end of message.

Shouldn't this just be moved into the DATA_TRANSFER case statement?

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