From: Thierry Reding <treding@xxxxxxxxxx>
The memory controller hot resets are implemented in the BPMP on Tegra186
and later, so there's no need to provide an implementation via the
memory controller driver. Conditionally register the reset controller
only if needed.
Signed-off-by: Thierry Reding <treding@xxxxxxxxxx>
---
drivers/memory/tegra/mc.c | 9 +++++----
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers/memory/tegra/mc.c b/drivers/memory/tegra/mc.c
index 515ffd948a37..23b7728623cb 100644
--- a/drivers/memory/tegra/mc.c
+++ b/drivers/memory/tegra/mc.c
@@ -768,10 +768,11 @@ static int tegra_mc_probe(struct platform_device *pdev)
}
}
- err = tegra_mc_reset_setup(mc);
- if (err < 0)
- dev_err(&pdev->dev, "failed to register reset controller: %d\n",
- err);
+ if (mc->soc->reset_ops) {
+ err = tegra_mc_reset_setup(mc);
+ if (err < 0)
+ dev_err(&pdev->dev, "failed to register reset controller: %d\n", err);
+ }
err = tegra_mc_interconnect_setup(mc);
if (err < 0)
--
2.30.2
