From: Thierry Reding <treding@xxxxxxxxxx>
Add the missing compatible string for the Tegra194 MISC block.
Signed-off-by: Thierry Reding <treding@xxxxxxxxxx>
---
.../devicetree/bindings/misc/nvidia,tegra186-misc.txt | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/misc/nvidia,tegra186-misc.txt b/Documentation/devicetree/bindings/misc/nvidia,tegra186-misc.txt
index 892ba4384abc..111dfac70ea7 100644
--- a/Documentation/devicetree/bindings/misc/nvidia,tegra186-misc.txt
+++ b/Documentation/devicetree/bindings/misc/nvidia,tegra186-misc.txt
@@ -1,11 +1,12 @@
-NVIDIA Tegra186 MISC register block
+NVIDIA Tegra186 (and later) MISC register block
-The MISC register block found on Tegra186 SoCs contains registers that can be
-used to identify a given chip and various strapping options.
+The MISC register block found on Tegra186 and later SoCs contains registers
+that can be used to identify a given chip and various strapping options.
Required properties:
- compatible: Must be:
- Tegra186: "nvidia,tegra186-misc"
+ - Tegra194: "nvidia,tegra194-misc"
- reg: Should contain 2 entries: The first entry gives the physical address
and length of the register region which contains revision and debug
features. The second entry specifies the physical address and length
--
2.28.0
