From: Thierry Reding <treding@xxxxxxxxxx>
The MISC block found on Tegra234 is mostly similar to the one on
Tegra194 but supports slightly different register sets that make
it incompatible.
Signed-off-by: Thierry Reding <treding@xxxxxxxxxx>
---
Documentation/devicetree/bindings/misc/nvidia,tegra186-misc.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/misc/nvidia,tegra186-misc.txt b/Documentation/devicetree/bindings/misc/nvidia,tegra186-misc.txt
index 111dfac70ea7..43d777ed8316 100644
--- a/Documentation/devicetree/bindings/misc/nvidia,tegra186-misc.txt
+++ b/Documentation/devicetree/bindings/misc/nvidia,tegra186-misc.txt
@@ -7,6 +7,7 @@ Required properties:
- compatible: Must be:
- Tegra186: "nvidia,tegra186-misc"
- Tegra194: "nvidia,tegra194-misc"
+ - Tegra234: "nvidia,tegra234-misc"
- reg: Should contain 2 entries: The first entry gives the physical address
and length of the register region which contains revision and debug
features. The second entry specifies the physical address and length
--
2.28.0
