Re: [PATCH v2 1/3] soc/tegra: fuse: Cache values of straps and Chip ID registers

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12.11.2019 07:44, Michał Mirosław пишет:
> On Tue, Nov 12, 2019 at 12:26:35AM +0300, Dmitry Osipenko wrote:
>> There is no need to re-read Chip ID and HW straps out from hardware each
>> time, it is a bit nicer to cache the values in memory.
> [...]
>> @@ -103,6 +97,7 @@ void __init tegra_init_revision(void)
>>  
>>  void __init tegra_init_apbmisc(void)
>>  {
>> +	void __iomem *apbmisc_base, *strapping_base;
>>  	struct resource apbmisc, straps;
>>  	struct device_node *np;
>>  
>> @@ -162,10 +157,14 @@ void __init tegra_init_apbmisc(void)
>>  	apbmisc_base = ioremap_nocache(apbmisc.start, resource_size(&apbmisc));
>>  	if (!apbmisc_base)
>>  		pr_err("failed to map APBMISC registers\n");
>> +	else
>> +		chipid = readl_relaxed(apbmisc_base + 4);
>>  
>>  	strapping_base = ioremap_nocache(straps.start, resource_size(&straps));
>>  	if (!strapping_base)
>>  		pr_err("failed to map strapping options registers\n");
>> +	else
>> +		strapping = readl_relaxed(strapping_base);
>>  
>>  	long_ram_code = of_property_read_bool(np, "nvidia,long-ram-code");
>>  }
> 
> Since this no longer uses the mappings after init, you could iounmap()
> them here.

Yes, it could be done. Although, that won't do much on ARM32 because APB
registers are statically mapped in arch/arm/mach-tegra/io.c.

Anyways, it should be good to have regs unmapped just for consistency.
Thank you for the suggestion, I'll add a patch for the unmapping.



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