02.05.2019 3:52, Dmitry Osipenko пишет: > 02.05.2019 3:17, Rob Herring пишет: >> On Wed, May 1, 2019 at 7:06 PM Dmitry Osipenko <digetx@xxxxxxxxx> wrote: >>> >>> 30.04.2019 1:05, Rob Herring пишет: >>>> On Sun, Apr 14, 2019 at 11:20:07PM +0300, Dmitry Osipenko wrote: >>>>> Add device-tree binding for NVIDIA Tegra30 External Memory Controller. >>>>> The binding is based on the Tegra124 EMC binding since hardware is >>>>> similar, although there are couple significant differences. >>>> >>>> My comments on Tegra124 binding apply here. >>> >>> The common timing definition doesn't fully match the definition that is >>> used by Tegra's Memory Controller, thus the DQS (data strobe) timing >>> parameter is comprised of multiple sub-parameters that describe how to >>> generate the strobe in hardware. There are also more additional >>> parameters that are specific to Tegra and they are individually >>> characterized for each memory model and clock rate. Hence the common >>> timing definition isn't usable. >> >> I don't understand. Every PC in the world can work with any DIMM >> (within a given generation) just with SPD data. Why is that not >> sufficient here? > > Because this is not a standard PC, but a custom embedded hardware that > is simpler and also doesn't fully follow the standards in some cases. Even if there is a way to derive at least some of required parameters from the common timing, I don't have information about how to do it and there is pretty much no chance to get it into public. Rob, please let me know if you're okay with this binding.
