On Wed, May 1, 2019 at 7:06 PM Dmitry Osipenko <digetx@xxxxxxxxx> wrote: > > 30.04.2019 1:05, Rob Herring пишет: > > On Sun, Apr 14, 2019 at 11:20:07PM +0300, Dmitry Osipenko wrote: > >> Add device-tree binding for NVIDIA Tegra30 External Memory Controller. > >> The binding is based on the Tegra124 EMC binding since hardware is > >> similar, although there are couple significant differences. > > > > My comments on Tegra124 binding apply here. > > The common timing definition doesn't fully match the definition that is > used by Tegra's Memory Controller, thus the DQS (data strobe) timing > parameter is comprised of multiple sub-parameters that describe how to > generate the strobe in hardware. There are also more additional > parameters that are specific to Tegra and they are individually > characterized for each memory model and clock rate. Hence the common > timing definition isn't usable. I don't understand. Every PC in the world can work with any DIMM (within a given generation) just with SPD data. Why is that not sufficient here? In any case, it seems for Tegra124 a different approach is going to be taken. Seems like an "avoid DT" solution to me, but if it's contained within the firmware it's not my problem. Rob
