Good Morning,
I have an OUYA console that I am attempting to get the 4.14 kernel
booted on.
It is a Tegra30-Cardhu based system, which from what I can tell had as
many corners cut during development as possible.
I do not have access to the firmware itself, and the firmware does not
support anything beyond 3.1.10, so I am using a kernel appended DTB.
The issue I'm running into right now is I cannot get the layer 2 cache
controller, a PL310, to init correctly.
I can disable the function, and I boot till DMA starts accessing
hardware and go into a hard lock.
If I have the L2C enabled, it kernel panics during L2c310_configure,
while trying to write the secure registers.
I am pretty sure the firmware is not using secure mode at all, and in
the cache-l2x0.c source the function states "By default, we write
directly to secure registers. Platforms must override this if they are
running non-secure."
I unfortunately cannot figure out how to override this function.
I would like to keep all or as much as possible any code modification to
the device tree and kernel configuration only.
Is there a way via the device tree to override secure mode?
I have included a full boot log up until the panic.
Very Respectfully,
Peter Geis
[bootloader] (built on Apr 16 2013, 16:46:06)
Initializing Display
Invalidate-only cache maint not supported in NvOs
Platform Pre Boot configuration...
SocCpuMaxKHz = 1000000
SocCpuMinKHz = 32
PLLX0 FreqKHz = 700000
Entering Fastboot based on booting mode configuration
Starting Fastboot USB download protocol
Key driver not found.. Booting OS
Cmd Rcvd: download:00870000
Response sent: DATA00870000
Response sent: OKAY
Cmd Rcvd: boot
Format partition USP
Region=0 SD Erase start 512B-sector=2686976,512B-sector-num=65536
Response sent: OKAY
Booting downloaded image
Platform Pre OS Boot configuration...
The proc BoardInfo: 0x0c5b:0x0b01:0x04:0x43:0x03
tegraid=30.1.3.0.0 mem=1022M@2048M commchip_id=0
androidboot.serialno=015d2d42dd
0fea0b androidboot.commchip_id=0 video=tegrafb no_console_suspend=1
console=ttyS
0,115200n8 debug_uartport=lsport,3 usbcore.old_scheme_first=1
lp0_vec=8192@0xbdd
f9000 tegra_fbmem=8302080@0xacc23000 core_edp_mv=1300 audio_codec=wm8903
board_i
nfo=c5b:b01:4:43:3 tegraboot=sdmmc gpt gpt_sector=15073279
android.kerneltype=no
rmal
Jumping to kernel at:5048 ms
Uncompressing Linux... done, booting the kernel.
Booting Linux on physical CPU 0x0
Linux version 4.14.0+ (master@master-laptop) (gcc version 7.3.0
(Ubuntu/Linaro 7.3.0-1ubuntu1)) #83 SMP PRE8
CPU: ARMv7 Processor [412fc099] revision 9 (ARMv7), cr=10c5387d
CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
OF: fdt: Machine model: NVIDIA Tegra30 Cardhu Ouya game console
bootconsole [earlycon0] enabled
Memory policy: Data cache writealloc
cma: Reserved 64 MiB at 0xbc000000
random: fast init done
percpu: Embedded 17 pages/cpu @ef79d000 s39436 r8192 d22004 u69632
Built 1 zonelists, mobility grouping on. Total pages: 260608
Kernel command line: earlycon=lsport,3 no_console_suspend=1
console=ttyS3,115200n8 earlyprintk kgdboc=ttyS3t
PID hash table entries: 4096 (order: 2, 16384 bytes)
Dentry cache hash table entries: 131072 (order: 7, 524288 bytes)
Inode-cache hash table entries: 65536 (order: 6, 262144 bytes)
Memory: 957388K/1048576K available (8747K kernel code, 764K rwdata,
2476K rodata, 568K init, 651K bss, 2565)
Virtual kernel memory layout:
vector : 0xffff0000 - 0xffff1000 ( 4 kB)
fixmap : 0xffc00000 - 0xfff00000 (3072 kB)
vmalloc : 0xf0800000 - 0xff800000 ( 240 MB)
lowmem : 0xc0000000 - 0xf0000000 ( 768 MB)
pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB)
modules : 0xbf000000 - 0xbfe00000 ( 14 MB)
.text : 0xc0008000 - 0xc089306c (8749 kB)
.init : 0xc0b3c000 - 0xc0bca000 ( 568 kB)
.data : 0xc0bca000 - 0xc0c89248 ( 765 kB)
.bss : 0xc0c917e0 - 0xc0d344ac ( 652 kB)
Preemptible hierarchical RCU implementation.
Tasks RCU enabled.
NR_IRQS: 16, nr_irqs: 16, preallocated irqs: 16
/interrupt-controller@60004000: 160 interrupts forwarded to
/interrupt-controller@50041000
L2C: platform modifies aux control register: 0x2c080000 -> 0x3c480001
L2C: DT/platform modifies aux control register: 0x2c080000 -> 0x3c480001
L2C-310 erratum 769419 enabled
L2C-310 enabling early BRESP for Cortex-A9
L2C-310: enabling full line of zeros but not enabled in Cortex-A9
Unhandled fault: imprecise external abort (0xc06) at 0x40431dd0
pgd = c0004000
[40431dd0] *pgd=00000000
Internal error: : c06 [#1] PREEMPT SMP ARM
Modules linked in:
CPU: 0 PID: 0 Comm: swapper/0 Not tainted 4.14.0+ #83
Hardware name: NVIDIA Tegra SoC (Flattened Device Tree)
task: c0bd1640 task.stack: c0bca000
PC is at l2c310_configure+0x188/0x19c
LR is at l2c_enable+0xf0/0x100
pc : [<c0022dc0>] lr : [<c002263c>] psr: 600000d3
sp : c0bcbeb8 ip : 00000020 fp : c0ab1c60
r10: 4100c090 r9 : c0c91c48 r8 : 00000008
r7 : 00000008 r6 : c0ab1c60 r5 : fe443000 r4 : c0c91c48
r3 : 00000000 r2 : 00000001 r1 : 00000008 r0 : 7c480001
Flags: nZCv IRQs off FIQs off Mode SVC_32 ISA ARM Segment none
Control: 10c5387d Table: 8000404a DAC: 00000051
Process swapper/0 (pid: 0, stack limit = 0xc0bca210)
Stack: (0xc0bcbeb8 to 0xc0bcc000)
bea0: c0c91c48 fe443000
bec0: c0ab1c60 c002263c 7c480001 fe443000 00000000 00000007 00000008
c0b438e4
bee0: 410000c7 c007ea78 c0c91c48 3c480001 c0bb4b80 00000008 410000c7
c0b436f4
bf00: 00100000 c0b44510 ef0000c0 00000000 c0bcaa34 c0022664 c00226cc
c0022714
bf20: c0023244 c00230f8 c002275c c0023214 00000000 00000000 c0bb4b80
c0c91c48
bf40: 410000c7 c0bb4b80 00000000 3c400001 c20fc3fe c0ba6a28 00000000
c0b44878
bf60: 00000000 c0158100 c20fc3fe 3c400001 c0bcbf80 00000002 50043000
50043fff
bf80: ef7e6b94 00000200 00000000 00000000 00000000 00000000 c0c91800
c0ba6a18
bfa0: c0c91800 c0bcdc40 ffffffff c0c91800 efffcc00 c0b3e72c 00000001
c0b3cb14
bfc0: ffffffff ffffffff 00000000 c0b3c674 00000000 c0ba6a28 c0c91a94
c0bcdc58
bfe0: c0ba6a24 c0bd2b58 8000406a 412fc099 00000000 8000807c 00000000
00000000
[<c0022dc0>] (l2c310_configure) from [<c002263c>] (l2c_enable+0xf0/0x100)
[<c002263c>] (l2c_enable) from [<c0b438e4>] (l2c310_enable+0x108/0x1fc)
[<c0b438e4>] (l2c310_enable) from [<c0b44510>]
(__l2c_init.part.6+0x194/0x224)
[<c0b44510>] (__l2c_init.part.6) from [<c0b44878>]
(l2x0_of_init+0x238/0x248)
[<c0b44878>] (l2x0_of_init) from [<c0b3e72c>] (init_IRQ+0x60/0x80)
[<c0b3e72c>] (init_IRQ) from [<c0b3cb14>] (start_kernel+0x24c/0x3a0)
[<c0b3cb14>] (start_kernel) from [<8000807c>] (0x8000807c)
Code: eaffffc5 e5850108 eaffffb8 e5850104 (eaffffab)
---[ end trace 8c862aec2896b62e ]---
Kernel panic - not syncing: Attempted to kill the idle task!
---[ end Kernel panic - not syncing: Attempted to kill the idle task!
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