Rob, Mark, Marc,
On 18/03/16 08:37, Jon Hunter wrote:
>
> On 17/03/16 20:14, Rob Herring wrote:
>> On Thu, Mar 17, 2016 at 9:19 AM, Jon Hunter <jonathanh@xxxxxxxxxx> wrote:
>>> Commit afbbd2338176 ("irqchip/gic: Document optional Clock and Power
>>> Domain properties") documented optional clock and power-dmoain properties
>>> for the ARM GIC. Currently, there are no users of these and for the
>>> Tegra210 Audio GIC (based upon the GIC-400) there are two clocks, a
>>> functional clock and interface clock, that need to be enabled.
>>>
>>> To allow flexibility, drop the 'clock-names' from the GIC binding and
>>> just provide a list of clocks which the driver can parse. It is assumed
>>> that any clocks that are listed, need to be enabled in order to access
>>> the GIC.
>>>
>>> Signed-off-by: Jon Hunter <jonathanh@xxxxxxxxxx>
>>>
>>> ---
>>>
>>> Please note that I am not sure if this will be popular, but I am trying
>>> to come up with a generic way to handle multiple clocks that may be
>>> required for accessing a GIC.
>>
>> It's not. :)
>>
>> We need to specify the number and order of clocks by compatible string
>> at a minimum. Sadly, ARM's GICs are well documented and include clock
>> names, so you can't just make up genericish names either which is
>> probably often the case.
>
> Do you have any suggestions then?
>
> I have had a look at the ARM TRMs and although I see that they do show
> the functional clock, there is no mention of whether there are any other
> clocks need in order to interface to the GIC (ie. bus clock). I know
> that for other SoCs such as OMAP it is common to have both a functional
> clock and interface clock. So I believe this is fairly common.
Any thoughts on how I should handle this for the Tegra AGIC?
Cheers
Jon
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