On 12/31/2014 12:42 AM, Lucas Stach wrote:
Am Montag, den 29.12.2014, 10:49 +0800 schrieb Vince Hsu:
[...]
That's a read fence to assure the post of the previous writes through
Tegra interconnect. (copy-paster from
https://android.googlesource.com/kernel/tegra.git/+/28b107dcb3aa122de8e94e48af548140d519298f)
I see what it does, the question is more about why this is needed.
What is the Tegra interconnect? According to the TRM the Tegra contains
some standard AXI <-> AHB <-> APB bridges. That a read is needed to
assure the write is posted to the APB bus seems to imply that there is
some write buffering in one of those bridges. Can we get this documented
somewhere?
The TRM does mention a read after the write. Check the section 32.2.2.3.
Unfortunately this doesn't seem to be included in the public TRM. It
would be nice if this could be documented either in the next version of
the TRM or as a public Appnote.
It should be in the latest public TRM. Could you check again?
Thanks,
Vince
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