RE: [PATCH] gpu: drm: tegra: Adjust dsi phy timing

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 



> Please use the scripts/get_maintainer.pl script to find the correct list
> of recipients.

ccing airlied@xxxxxxxx, tbergstrom@xxxxxxxxxx, swarren@xxxxxxxxxxxxx and gnurou@xxxxxxxxx


> > Fixing DSI phy setting of HS trail timings.
> 
> You're going to have to explain /why/ you're making this change and
> describe what exactly this fixes. DSI works fine on any of the boards
> that I have, so I'm surprised that this would need "fixing".

It is found by hardware that after HS data burst, the HS trail is off by -12% during compliance testing.

> Also: "phy" -> "PHY".

I'll adjust comment.


> My recollection is that I took these timing values straight from the
> D-PHY specification, so you're going to have to explain why this is
> necessary and where you took this from.

There is set of timings recommendations in the tegra dsi programming guide.
The D-PHY spec is the minimal setting, but the SOC may need other adjustments.

David
--
To unsubscribe from this list: send the line "unsubscribe linux-tegra" in
the body of a message to majordomo@xxxxxxxxxxxxxxx
More majordomo info at  http://vger.kernel.org/majordomo-info.html




[Index of Archives]     [ARM Kernel]     [Linux ARM]     [Linux ARM MSM]     [Linux USB Devel]     [Video for Linux]     [Linux Audio Users]     [Yosemite News]     [Linux Kernel]     [Linux SCSI]

  Powered by Linux