Please use the scripts/get_maintainer.pl script to find the correct list of recipients. On Mon, Dec 01, 2014 at 04:52:02PM -0800, David Ung wrote: > Fixing DSI phy setting of HS trail timings. You're going to have to explain /why/ you're making this change and describe what exactly this fixes. DSI works fine on any of the boards that I have, so I'm surprised that this would need "fixing". Also: "phy" -> "PHY". > > Signed-off-by: David Ung <davidu@xxxxxxxxxx> > --- > drivers/gpu/drm/tegra/mipi-phy.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/tegra/mipi-phy.c b/drivers/gpu/drm/tegra/mipi-phy.c > index 486d19d..974bc68 100644 > --- a/drivers/gpu/drm/tegra/mipi-phy.c > +++ b/drivers/gpu/drm/tegra/mipi-phy.c > @@ -34,7 +34,7 @@ int mipi_dphy_timing_get_default(struct mipi_dphy_timing *timing, > timing->hszero = 145 + 5 * period; > timing->hssettle = 85 + 6 * period; > timing->hsskip = 40; > - timing->hstrail = max(8 * period, 60 + 4 * period); > + timing->hstrail = 3 * period * 8 + max(8 * period, 60 + 4 * period); My recollection is that I took these timing values straight from the D-PHY specification, so you're going to have to explain why this is necessary and where you took this from. Thierry
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