On 06/24/2014 07:33 PM, Alexandre Courbot wrote:
On 06/24/2014 07:02 PM, Russell King - ARM Linux wrote:
On Tue, Jun 24, 2014 at 06:54:26PM +0900, Alexandre Courbot wrote:
From: Lucas Stach <dev@xxxxxxxxxx>
On architectures for which access to GPU memory is non-coherent,
caches need to be flushed and invalidated explicitly at the
appropriate places. Introduce two small helpers to make things
easy for TTM-based drivers.
Have you run this with DMA API debugging enabled? I suspect you haven't,
and I recommend that you do.
# cat /sys/kernel/debug/dma-api/error_count
162621
(╯°□°）╯︵ ┻━┻)
*puts table back on its feet*
So, yeah - TTM memory is not allocated using the DMA API, hence we
cannot use the DMA API to sync it. Thanks Russell for pointing it out.
The only alternative I see here is to flush the CPU caches when syncing
for the device, and invalidate them for the other direction. Of course
if the device has caches on its side as well the opposite operation must
also be done for it. Guess the only way is to handle it all by ourselves
here. :/
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