On 10/31/2013 02:18 AM, Hiroshi Doyu wrote:
> Stephen Warren <swarren@xxxxxxxxxxxxx> wrote @ Wed, 30 Oct 2013 23:44:04 +0100:
>
>>> + host1x {
>>> + compatible = "nvidia,tegra30-host1x", "simple-bus";
>>> + nvidia,memory-clients = <&smmu TEGRA_SWGROUP_HC>;
>>> + ....
>>> + gr3d {
>>> + compatible = "nvidia,tegra30-gr3d";
>>> + nvidia,memory-clients = <&smmu TEGRA_SWGROUP_NV
>>> + TEGRA_SWGROUP_NV2>;
>>
>> Why one cell for the host1x property, and two cells for the gr3d
>> property; shouldn't they be the same length?
>
> That can vary. Even a single device node in DT can belong to multiple
> software groups.
>
>>> diff --git a/drivers/iommu/tegra-smmu.c b/drivers/iommu/tegra-smmu.c
>>
>>> +static u64 smmu_of_get_memory_client(struct device *dev)
>>
>>> + np = of_parse_phandle(dev->of_node, propname, 0);
>>> + if (np != smmu_handle->dev->of_node)
>>> + return ~0;
>>> +
>>> + prop = of_get_property(dev->of_node, propname, &bytes);
>>> + if (!prop || !bytes)
>>> + return ~0;
>>
>> of_parse_phandle_with_fixed_args() might be a good fit here, or perhaps
>> require a property #smmu-cells in the SMMU node, thus allowing the
>> non-fixed-length of_parse_phandle_with_args() to be used here.
>
> I once considered of_parse_phandle_with_args() but I couldn't use that
> since "#smmu-cells" needed to be fixed in smmu node, not in client
> node. In this case, the number of argument(number of swgroup IDs)
> varies per client device.
You could fix that by using a bitmask instead of a list. But, inverting
the order of the properties to match the ARM SMMU binding might also
solve this...
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