On 01/15/2013 01:17 AM, Hiroshi Doyu wrote:
> There are 3 SMMU MMIO register blocks. They may get bigger as new
> Tegra SoC comes. This patch enables to support variable size of those
> register blocks.
Why would the register blocks move around? In the HW, there's one single
chunk of memory containing all the SMMU registers, and we simply carve
out a few holes since some unrelated registers are stuck in the middle,
thus leaving us with 3 register ranges. If the size of those carved out
chunks changes, then doesn't that mean all the registers moved around
within the single chunk, and hence all the register offsets in the
driver become invalid?
It may help if you provide an explicit example of what the register
layout change is...
> diff --git a/drivers/iommu/tegra-smmu.c b/drivers/iommu/tegra-smmu.c
> static inline u32 smmu_read(struct smmu_device *smmu, size_t offs)
> {
> BUG_ON(offs < 0x10);
> - if (offs < 0x3c)
> + if (offs < 0x10 + smmu->regsz[0])
> return readl(smmu->regs[0] + offs - 0x10);
> BUG_ON(offs < 0x1f0);
> - if (offs < 0x200)
> + if (offs < 0x1f0 + smmu->regsz[1])
Wouldn't you need to adjust that BUG_ON() in a similar way to how the if
condition was adjusted?
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