On 12/17/2012 10:58 AM, Lucas Stach wrote: > Calculate PLL_D parameters in a dynamically instead of using a fixed > table. This allows TegraDRM to drive outputs with CVT compliant modes. Prashant, can you please review this, and comment on the best approach for dealing with the conflict this has with your clock driver rework. Thanks. Lucas, I assume this algorithm generates the same cpcon values (and indeed M/N/P values) as were in the fixed pll_d_freq_table before? -- To unsubscribe from this list: send the line "unsubscribe linux-tegra" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
