Fix various punctuation and grammar typos in <linux/spi/spi.h>. Signed-off-by: Randy Dunlap <rdunlap@xxxxxxxxxxxxx> --- Cc: Mark Brown <broonie@xxxxxxxxxx> Cc: linux-spi@xxxxxxxxxxxxxxx include/linux/spi/spi.h | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff -- a/include/linux/spi/spi.h b/include/linux/spi/spi.h --- a/include/linux/spi/spi.h +++ b/include/linux/spi/spi.h @@ -227,9 +227,9 @@ struct spi_device { struct spi_statistics __percpu *pcpu_statistics; /* Bit mask of the chipselect(s) that the driver need to use from - * the chipselect array.When the controller is capable to handle + * the chipselect array. When the controller is capable of handling * multiple chip selects & memories are connected in parallel - * then more than one bit need to be set in cs_index_mask. + * then more than one bit needs to be set in cs_index_mask. */ u32 cs_index_mask : SPI_CS_CNT_MAX; @@ -611,8 +611,8 @@ struct spi_controller { }; /* - * On some hardware transfer / message size may be constrained - * the limit may depend on device transfer settings. + * On some hardware, transfer / message size may be constrained. + * The limit may depend on device transfer settings. */ size_t (*max_transfer_size)(struct spi_device *spi); size_t (*max_message_size)(struct spi_device *spi); @@ -676,7 +676,7 @@ struct spi_controller { void (*cleanup)(struct spi_device *spi); /* - * Used to enable core support for DMA handling, if can_dma() + * Used to enable core support for DMA handling; if can_dma() * exists and returns true then the transfer will be mapped * prior to transfer_one() being called. The driver should * not modify or store xfer and dma_tx and dma_rx must be set @@ -1052,10 +1052,10 @@ struct spi_res { * by the results of previous messages and where the whole transaction * ends when the chipselect goes inactive. * - * When SPI can transfer in 1x,2x or 4x. It can get this transfer information + * When SPI can transfer in 1x, 2x or 4x, it can get this transfer information * from device through @tx_nbits and @rx_nbits. In Bi-direction, these - * two should both be set. User can set transfer mode with SPI_NBITS_SINGLE(1x) - * SPI_NBITS_DUAL(2x) and SPI_NBITS_QUAD(4x) to support these three transfer. + * two should both be set. User can set transfer mode with SPI_NBITS_SINGLE(1x), + * SPI_NBITS_DUAL(2x) and SPI_NBITS_QUAD(4x) to support these three transfers. * * The code that submits an spi_message (and its spi_transfers) * to the lower layers is responsible for managing its memory.